Interconnect Capping Materials for Electromigration Control in E-Fuses
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Solution Overview
Problem
Electrical fuses in integrated circuitry face issues with undesirable hillock formation due to electromigration, which affects the reliability and yield of memory devices, as existing technologies fail to prevent material pile-up and void formation at the anode end of the fuse element.
Innovation Solution
The method involves forming interconnect structures with different capping materials and interfacial properties to control electromigration resistance, allowing for the same process flow to create both normal interconnects and programmable e-fuses, where the capping material and wiring layers undergo specific processes to alter their interfacial properties, preventing hillock formation and enabling e-fuses to blow at different current levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electromigration effect is used to open electrical connection in fuses, then fuse programming function is achieved, but hillock formation occurs at anode end causing reliability issues
Solution Approach 1:
The patent applies different capping materials to different regions of the fuse structure. Specifically, a first capping material with high EM resistance is used at the anode end to prevent hillock formation, while a second capping material with lower EM resistance is used at the cathode end to facilitate void formation. This local differentiation of material properties resolves the contradiction by addressing the specific needs of each region.
Solution Approach 2:
The patent uses composite capping structures with multiple materials having different electromigration resistance properties. The combination of high EM resistance material at the anode and lower EM resistance material at the cathode creates a composite system that simultaneously prevents harmful hillock formation while enabling the desired fuse opening mechanism.
2Reliability
If separate process flows are used for normal interconnects and e-fuses, then different interfacial properties can be achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent makes the standard interconnect process flow universal by modifying it to automatically create different interfacial properties for e-fuses without requiring separate processing. The key is using a capping material deposition process that inherently creates different interfaces based on the underlying wiring layer history, allowing both normal interconnects and programmable e-fuses to be fabricated through the same process flow.
Solution Approach 2:
The patent changes the interfacial properties parameter through controlled modification of the capping material deposition process. By adjusting deposition conditions or material selection, the process creates different interfacial characteristics (such as adhesion strength or diffusion barriers) that determine whether the structure becomes a normal interconnect or a programmable e-fuse, all within the same process flow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces processing costs by integrating e-fuse fabrication into standard interconnect processes, prevents undesirable hillock formation, and allows for programmable e-fuses with varying electromigration resistance, enhancing the reliability and versatility of memory devices.
Implementation Method 1
Some electrically blowable fuses take advantage of the electromigration (EM) effect to open an electrical connection. EM is the transport of material caused by the gradual movement of ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms.
Data Source
AI summary
Methods are provided for fabricating interconnect structures containing various capping materials for electrical fuses and other related applications. The method includes forming a first interconnect structure having a first interfacial structure and forming a second interconnect structure adjacent to the first structure. The second interconnect structure is formed with a second interfacial structure different from the first interfacial structure of the first interconnect structure.