E-paper Array Substrate with Leveling Layer for Uniform Electric Field
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Solution Overview
Problem
The manufacturing process of E-paper array substrates is complex and costly, leading to uneven surfaces and non-uniform drain electric fields, which affect the display quality of E-paper.
Innovation Solution
A method involving the deposition of an insulating leveling layer on a glass substrate, followed by the formation of gate and storage capacitor electrodes using a first mask, and subsequent layers with a second mask, to create a uniform electrode layer and facilitate E-ink coating, all while maintaining the same number of masks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a 2mask process is used to simplify manufacturing, then manufacturing complexity is reduced, but surface uniformity deteriorates causing steps in the structure
Solution Approach 1:
The patent segments the manufacturing process into two distinct mask steps: first forming the gate electrode pattern, then forming the source/drain electrode and channel region pattern. This segmentation allows each mask step to be optimized independently, maintaining surface uniformity while keeping the overall process simple.
Solution Approach 2:
The patent performs preliminary actions by carefully designing the mask patterns and deposition sequences to ensure that each layer is formed uniformly before the next step. The gate electrode is formed first with precise patterning, then the source/drain regions are formed in a subsequent step, ensuring surface uniformity is maintained throughout the simplified 2mask process.
2Ease of manufacture
If manufacturing process is simplified, then production cost is reduced, but surface steps are created affecting E-ink coating
Solution Approach 1:
The manufacturing process is segmented into controlled deposition steps where each layer (gate electrode, source/drain electrode, channel region) is formed separately with precise patterning. This segmentation ensures that each layer has a uniform surface, facilitating proper E-ink coating while maintaining manufacturing simplicity.
Solution Approach 2:
The patent changes the parameters of the deposition process, including layer thickness, material composition, and patterning dimensions, to optimize surface uniformity. By carefully controlling these parameters in each step, the patent achieves a uniform surface that supports E-ink coating while keeping the manufacturing process simple and cost-effective.
3Device complexity
If drain electrode is used as driving electrode, then manufacturing steps are reduced, but electric field distribution becomes non-uniform
Solution Approach 1:
The patent segments the electrode structure into distinct functional regions: gate electrode, source/drain electrode, and channel region, each formed in separate patterning steps. This segmentation allows precise control over the geometry and positioning of each electrode, ensuring uniform electric field distribution while maintaining relatively simple manufacturing.
Solution Approach 2:
The patent applies local quality by giving different regions of the substrate different electrode structures and properties. The gate electrode region, source/drain region, and channel region are locally optimized with specific materials, thicknesses, and patterns to achieve uniform electric field distribution across the entire device while keeping the overall structure manageable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates surface steps, ensuring a uniform drain electric field and improving E-paper display quality by simplifying the coating process and enhancing the substrate structure.
Implementation Method 1
an insulating leveling layer is deposited on a glass substrate
Implementation Method 2
a metal layer is deposited on the glass substrate obtained after the Step 1
Implementation Method 3
an insulator layer, an amorphous silicon layer, an n+ amorphous silicon layer and a source/drain metal layer are respectively deposited on the glass substrate obtained after the Step 2
Data Source
AI summary
A method for manufacturing E-paper array substrate and an E-paper array substrate are provided. The method for manufacturing E-paper array substrate uses two masks. Steps on a surface of the array substrate structure are eliminated, so as to facilitate a subsequent coating process of E-ink and enable a uniform distribution of a drain electric field. An E-paper array substrate is further provided.