Early-Formed Gate-Cut Structure for Semiconductor Isolation

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Solution Overview

Problem

The formation of gate-cut structures in semiconductor devices requires high precision to maintain process margins and prevent material loss and residue formation, which complicates the manufacturing process and degrades isolation properties.

Innovation Solution

The gate-cut structure is formed at an early stage by replacing dummy channel and active patterns, ensuring a positive slope profile and continuous extension, which maintains width consistency and facilitates subsequent manufacturing steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If gate-cut structure is formed at late stage of manufacturing process, then isolation properties are improved, but process complexity and difficulty increase

Engineering Contradiction:
Improveisolation propertiesVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate-cut structure is formed at an early stage of the manufacturing process, specifically before forming the gate electrode and gate dielectric layer. This preliminary formation simplifies subsequent processing steps while maintaining effective isolation between adjacent gate structures, thereby resolving the contradiction between process complexity and isolation properties.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If high precision is used in gate-cut structure formation, then material loss and residue formation are reduced, but manufacturing time and cost increase

Engineering Contradiction:
Improveprecision in gate-cut formationVSAvoidmanufacturing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

By forming the gate-cut structure early in the manufacturing process using a sacrificial layer approach, the need for high-precision subsequent etching is eliminated. The sacrificial layer provides a built-in mask that defines the gate-cut position, reducing the precision requirements for later steps and thereby reducing manufacturing time while maintaining material integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A sacrificial layer is introduced as an intermediary element to define the gate-cut structure. This sacrificial layer serves as a temporary mask during gate electrode formation and is later removed, providing precise gate-cut definition without requiring high-precision etching of the gate electrode itself, thus reducing manufacturing complexity and time.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If gate-cut structure is formed after gate electrode formation, then gate contact formation is simplified, but material loss and residue formation increase

Engineering Contradiction:
Improvegate contact formationVSAvoidmaterial loss
Core Design Contradiction:
Ease of manufactureVSLoss of substance

Solution Approach 1:

The gate-cut structure is formed before gate electrode deposition, allowing the gate electrode material to be deposited continuously across the entire gate region. The pre-formed gate-cut structure (using sacrificial layer) ensures proper material placement and prevents material loss or residue formation that would occur with post-formation gate-cuts, while still enabling simplified gate contact formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of forming the gate-cut structure after gate electrode formation (conventional approach), the invention inverts the sequence by forming the gate-cut structure first using a sacrificial layer. This inversion allows the gate electrode to be formed as a continuous layer, eliminating material loss and residue issues while maintaining ease of gate contact formation.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS20250301704A1Semiconductor device including gate-cut structure formed at early step of manufacturing process
Publication Date: 2025.09.25 SAMSUNG ELECTRONICS CO LTD
  • US20250301704A1 patent drawing
  • US20250301704A1 patent drawing
  • US20250301704A1 patent drawing

AI summary

Provided is a semiconductor device which includes: a 1st gate structure; a 2nd gate structure at a side of the 1st gate structure in a 2nd direction crossing a 1st direction; an isolation structure below the 1st gate structure and the 2nd gate structure in a 3rd direction crossing the 1st direction and the 2nd direction; and a gate-cut structure between the 1st gate structure and the 2nd gate structure, wherein a width of the gate-cut structure in the 2nd direction increases in the 3rd direction from a level of a top surface of the 1st gate structure or the 2nd gate structure to a level of a bottom surface of the isolation structure.