Ear-Worn Audio Compression After Neural Noise Reduction
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Solution Overview
Problem
Existing ear-worn devices face challenges in effectively reducing noise and applying wide dynamic range compression (WDRC) while minimizing latency and power consumption, which can disrupt natural sound processing and user experience.
Innovation Solution
Implementing neural network-based noise reduction circuitry and WDRC on a single chip within the ear-worn device, utilizing a neural network chip for efficient noise separation and WDRC operations, and applying noise gain to enhance audio signals, while using beamforming and STFT/ISTFT for frequency and time domain processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If noise reduction and WDRC are implemented as separate processing stages in traditional ear-worn devices, then each function can be independently optimized, but the overall system latency increases and power consumption rises
Solution Approach 1:
The patent combines noise reduction and WDRC processing into a unified neural network-based system that operates on a single chip. The noise reduction network and WDRC network share computational resources and processing pipelines, eliminating the need for separate processing stages. This integration maintains the effectiveness of both functions while significantly reducing overall processing latency and power consumption.
Solution Approach 2:
The unified processing system is segmented into specialized neural network components (noise reduction network and WDRC network) that operate in an integrated manner. Each network is optimized for its specific function but they share the same computational infrastructure, allowing independent optimization of each function while benefiting from the efficiency gains of integration.
2Adaptability or versatility
If traditional separate processing architectures are used for noise reduction and WDRC, then functional independence is maintained, but device complexity and power consumption increase
Solution Approach 1:
The patent merges noise reduction and WDRC into a single integrated processing architecture implemented on one chip. The system maintains functional independence through separate neural network modules that share common computational resources, thereby reducing device complexity while preserving the adaptability and versatility of independent function optimization.
3Measurement precision
If separate chips or processors are used for noise reduction and WDRC, then each function can be independently optimized, but power consumption and device size increase
Solution Approach 1:
The patent implements both noise reduction and WDRC processing on a single chip using shared computational resources. The unified neural network architecture allows both functions to operate simultaneously with efficient resource utilization, significantly reducing power consumption compared to separate chip implementations while maintaining processing accuracy through specialized network designs for each function.
Data Source
AI summary
Disclosed herein is wide dynamic range compression (WDRC) circuitry that may be configured to determine a WDRC gain based on a level of an input audio signal and apply the WDRC gain to an enhanced audio signal generated using neural network circuitry. In some embodiments, WDRC circuitry may include speech level calculation circuitry configured to determine a first level, where the first level is calculated based, at least in part, on speech in the input audio signal; level selection circuitry configured to select a level that is the first level if the first level is greater than a threshold level, and a second level, different from the first level, if the first level is not greater than the threshold level; and WDRC gain circuitry configured to determine a WDRC gain based on the level selected by the level selection circuitry.