Wafer-Scale EBCMOS Imager Arrays With TMSE Gain Stacking
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Solution Overview
Problem
Conventional image intensifier production techniques fail to efficiently and cost-effectively manufacture multiple image intensifiers simultaneously on a wafer scale, particularly in forming and vacuum sealing the components to achieve consistent and reliable production.
Innovation Solution
The integration of electron bombarded complementary metal oxide semiconductor (EBCMOS) imagers with primary and secondary electron multipliers, utilizing semiconductor fabrication techniques to form EBCMOS imager anodes and secondary electron multipliers on stacked wafers, allowing for concurrent formation and vacuum sealing of multiple image intensifiers across a wafer scale.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional image intensifier production techniques are used, then individual image intensifiers can be manufactured, but production efficiency is low and cost is high due to inability to manufacture multiple units simultaneously
Solution Approach 1:
The image intensifier is divided into separate functional components (photocathode, electron multipliers, anode) that can be independently fabricated on separate wafers using standard semiconductor processes, then later assembled. This segmentation enables parallel manufacturing of multiple units while maintaining component quality and simplifying the overall production workflow.
Solution Approach 2:
Multiple image intensifier components are fabricated on stacked wafers in a three-dimensional arrangement. The wafers are stacked vertically with precise spacing, allowing concurrent fabrication of multiple intensifier units in the vertical dimension rather than sequentially on a single plane, thereby dramatically increasing production efficiency.
2Productivity
If multiple image intensifiers are formed on stacked wafers, then production cost decreases and efficiency increases, but vacuum sealing becomes more complex
Solution Approach 1:
Multiple individual vacuum sealing operations are merged into a single simultaneous vacuum sealing process. The stacked wafers are sealed together as one unit, creating multiple sealed image intensifiers concurrently. This approach reduces the total number of sealing operations, minimizes contamination risk, and simplifies the overall vacuum sealing process despite the increased number of units being produced.
3Reliability
If electron gain is enhanced using additional electron multipliers, then image quality at low light levels improves, but device complexity increases
Solution Approach 1:
An additional secondary electron multiplier is introduced as an intermediary stage between the photocathode and the final anode. This intermediate multiplication stage amplifies the electron signal before it reaches the final detection layer, providing enhanced gain for low-light conditions while maintaining a structured and manageable device architecture.
Solution Approach 2:
Multiple electron multiplication functions are nested within a compact stacked wafer structure. The primary and secondary electron multipliers are integrated in a nested arrangement where each multiplication stage is contained within the overall device stack, achieving high electron gain without proportionally increasing the device's external dimensions or operational complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the cost-effective and reliable production of multiple image intensifiers with enhanced electron gain, maintaining high image quality across low light levels, suitable for portable applications, by aligning and bonding components on stacked wafers to create co-planar arrays within a vacuum housing.
Implementation Method 1
The photocathode receives the image, converts photons to electrons
Implementation Method 2
The imager anode can include a primary electron multiplier. The primary electron multiplier is preferably an electron bombarded device (EBD) with one gain stage
Data Source
AI summary
An apparatus, system and method is provided for producing stacked wafers containing an array of image intensifiers that can be evacuated on a wafer scale. The wafer scale fabrication techniques, including bonding, evacuation, and compression sealing concurrently forms a plurality of EBCMOS imager anodes with design elements that enable high voltage operation with optional enhancement of additional gain via TMSE amplification. The TMSE amplification is preferably one or more multiplication semiconductor wafers of an array of EBD die placed between a photocathode within a photocathode wafer and an imager anode that is preferably an EBCMOS imager anode bonded to or integrated within an interconnect die within an interconnect wafer.