ECaMS Processor Node Synchronization Using Control Cycle Counts

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Solution Overview

Problem

Existing Engine Control and Monitoring Systems (ECaMS) for complex engines, particularly those with segregated Control and Optimising System (CnOS) and Monitoring and Optimisation System (MnOS), face challenges in achieving adaptability and versatility due to the lack of universal synchronization between processor nodes, which can lead to unscheduled interruptions or failures.

Innovation Solution

A method for synchronizing processor nodes in ECaMS by counting control cycle counts and transmission slot indexes at each node, adjusting these values if necessary, and using a ring network to transmit and synchronize messages between nodes, ensuring robust communication even in the event of failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If processor nodes in ECaMS use separate clock sources to maintain independence, then system reliability is improved through segregation of control and monitoring functions, but synchronization between processor nodes deteriorates leading to potential failures

Engineering Contradiction:
Improvesystem reliabilityVSAvoidsynchronization between processor nodes
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent introduces a synchronization message as an intermediary that carries timing information between processor nodes. This message enables coordination and synchronization between nodes that use separate clock sources, allowing them to maintain independence while achieving temporal alignment through the exchanged timing data.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If ECaMS uses segregated control and monitoring systems for safety, then system safety is improved by preventing interaction between control and protection functions, but adaptability and versatility worsen due to lack of universal synchronization

Engineering Contradiction:
Improvesystem safetyVSAvoidadaptability and versatility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The synchronization message serves multiple functions: it enables timing coordination between segregated control and monitoring systems while also providing a universal mechanism that can be applied across different processor node configurations. This universal synchronization approach allows the system to maintain safety through segregation while gaining adaptability through a standardized coordination protocol.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If processor nodes operate independently without universal clock source, then ease of manufacture is improved by allowing flexible system configuration, but loss of information worsens due to lack of synchronized timing data

Engineering Contradiction:
Improveflexible system configurationVSAvoidsynchronized timing data
Core Design Contradiction:
Ease of manufactureVSLoss of information

Solution Approach 1:

The synchronization message implements a feedback mechanism where processor nodes exchange timing information about their control cycle counts and transmission slot indexes. This feedback loop allows independently configured nodes to compensate for timing differences and reconstruct synchronized timing data, preventing information loss while maintaining manufacturing flexibility.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4531312A1Method for engine control and monitoring system
Publication Date: 2025.04.02 ROLLS ROYCE PLC
  • EP4531312A1 patent drawingFigure 1~2
  • EP4531312A1 patent drawingFigure 3
  • EP4531312A1 patent drawingFigure 4

AI summary

Synchronisation methods for synchronising processor nodes of an Engine Control and Monitoring System (ECaMS) for an engine. A method comprises counting, at a first acquisition integrated circuit in a first processor node of the ECaMS, a first control cycle count, and storing at the first acquisition integrated circuit a first transmission slot index. The method further comprises counting a second control cycle count and storing a second transmission slot index at a second acquisition integrated circuit in a second processor node of the ECaMS. The method also comprises transmitting a message including the first control cycle count and transmission slot index from the first to second acquisition integrated circuits, and receiving the message at the second acquisition circuit. The method also comprises synchronising the first and second processor nodes using the first and second control cycle counts and transmission slot indexes.