Memory Controller ECC Allocation Across Fatigued Memory Areas
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Solution Overview
Problem
As memory devices miniaturize and become multivalued, the probability of errors increases, necessitating stronger error correction codes, but existing methods to enhance error correction capability, such as increasing parity data size, lead to increased circuit complexity and reduced user data storage capacity.
Innovation Solution
A memory controller that dynamically adjusts the error correction encoding method based on the fatigue degree of memory areas, switching to higher error correction capabilities when necessary while maintaining a total parity sum below a threshold, thereby improving error correction without increasing circuit scale or data size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the data size of parity is increased to improve error correction capability, then error correction capability is improved, but circuit scale increases and user data storage capacity decreases
Solution Approach 1:
The patent implements dynamic adjustment of error correction capability by switching between different encoding methods (first encoding method with lower correction capability and second encoding method with higher correction capability) based on the fatigue degree of memory areas. This allows the system to adapt error correction strength to actual needs rather than using a fixed high-capability encoding scheme, thereby reducing overall circuit complexity while maintaining reliability where necessary.
Solution Approach 2:
The patent applies different encoding methods to different memory areas based on their individual fatigue degrees. Memory areas with lower fatigue use a first encoding method with lower error correction capability, while areas with higher fatigue use a second encoding method with higher capability. This localized approach ensures error correction resources are allocated efficiently without unnecessarily increasing circuit scale for all memory areas.
2Reliability
If the data size of parity is increased to improve error correction capability, then error correction capability is improved, but the capacity of user data to be stored decreases
Solution Approach 1:
The system dynamically switches between encoding methods with different parity overheads based on memory fatigue. When memory areas are in good condition, a more efficient encoding method is used that allocates less space to parity and more to user data. When fatigue increases, the system switches to a more robust encoding method. This dynamic approach maximizes user data storage capacity while maintaining adequate error correction capability.
Solution Approach 2:
Different encoding schemes are applied to different memory areas according to their fatigue levels. Memory areas with low fatigue use encoding methods with smaller parity overhead, preserving more storage capacity for user data. Only areas with high fatigue use encoding methods with larger parity overhead, ensuring error correction capability is enhanced locally where needed without sacrificing overall storage capacity.
3Reliability
If a stronger error correcting code is used to handle increased error probability in miniaturized memory, then error correction capability is improved, but circuit complexity and memory size increase
Solution Approach 1:
The patent implements a dynamic encoding method selection mechanism that adjusts error correction strength based on real-time memory fatigue monitoring. The controller switches between a first encoding method (suitable for low-fatigue areas) and a second encoding method (suitable for high-fatigue areas), avoiding the need to implement complex high-capability error correction circuits throughout the entire memory system. This reduces overall circuit complexity while maintaining reliability where needed.
Solution Approach 2:
The system applies different encoding methods to different memory areas based on their fatigue characteristics. Areas with low fatigue use simpler encoding methods, while areas with high fatigue use more robust encoding methods. This localized differentiation allows the memory system to achieve adequate error correction capability without implementing complex error correction circuits across all memory areas, thereby reducing overall circuit complexity.
Data Source
AI summary
According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.