Systematic ECC Encoding With Balance Bits for Affine Constraints

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Solution Overview

Problem

Existing systematic encoders struggle to enforce additional affine constraints required by certain error correction codes, such as those represented by the constraints matrix P and vector d, leading to a need for a method that can generate codewords in set C0 while adhering to these constraints.

Innovation Solution

A method involving a systematic encoder that adds balance bits to the input vector, uses a constraints transform module to compute preliminary constraints vectors, and applies a transition matrix to determine updated balance bits, ensuring the output codeword meets the desired constraints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a simple systematic encoder is used to encode information bits, then the encoding process is simple and efficient, but the encoder cannot enforce additional affine constraints required by certain error correction codes

Engineering Contradiction:
Improveencoding simplicityVSAvoidconstraint enforcement capability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The encoding process is divided into two independent stages: first, a simple systematic encoder generates a preliminary codeword without constraints; second, a separate constraint satisfaction module computes balance bits to enforce affine constraints. This segmentation allows each module to be optimized independently, maintaining simplicity while adding constraint enforcement capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Balance bits are introduced as intermediary elements between the information bits and the constrained codeword. These balance bits serve as a mediator that absorbs the constraint requirements, allowing the simple systematic encoder to operate unchanged while the constraints are satisfied through the balance bits.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If balance bits are added to enforce affine constraints, then constraint satisfaction is achieved, but computational complexity increases

Engineering Contradiction:
Improveconstraint satisfactionVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The approach changes the parameter representation by working with balance bits instead of directly modifying the systematic encoder structure. By parameterizing the constraint satisfaction problem in terms of balance bit calculations through matrix operations, the complexity is transformed into a more manageable form that can be efficiently computed.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The balance bits are calculated in advance before final codeword generation. The constraint satisfaction module pre-computes the necessary balance bit values based on the information bits and constraint equations, allowing the main encoder to proceed without iterative adjustments or complex real-time computations.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If a two-stage encoding approach is used with balance bits, then affine constraints are enforced, but the encoding process becomes more complex

Engineering Contradiction:
Improveconstraint enforcementVSAvoidencoding process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The balance bit calculation mechanism serves multiple functions: it enforces affine constraints, maintains systematic encoder compatibility, and can be applied to various error correction code types. This universal approach allows the same two-stage structure to handle different constraint types without requiring specialized encoding logic for each case.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4459878B1Low-power systematic ECC encoder with balancing bits
Publication Date: 2026.04.15 SAMSUNG ELECTRONICS CO LTD
  • EP4459878B1 patent drawingFigure 1
  • EP4459878B1 patent drawingFigure 2A
  • EP4459878B1 patent drawingFigure 2B

AI summary

Systems, devices, and methods for encoding information bits for storage, including obtaining information bits and a target constraints vector, placing the information bits in an input vector, setting balance bits included in the input vector to zero, encoding the input vector using a systematic code to obtain a preliminary codeword, applying a constraints matrix to the preliminary codeword to obtain a preliminary constraints vector, applying a transition matrix to a sum of the preliminary constraints vector and the target constraints vector to determine updated balance bits, obtaining an output codeword based on the information bits and the updated balance bits, and storing the output codeword in the storage device.