ECC Buffer Validation in Data Relocation for Memory Integrity

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Solution Overview

Problem

During data relocation operations in non-volatile storage devices, data stored in a host memory buffer can become corrupted or overwritten, leading to incorrect data being written to the memory device, which compromises data integrity and accuracy.

Innovation Solution

The implementation of a data validity operation module within the controller, which includes an error correction code engine, comparator, and data validity indicator, reads data from a first portion of the memory, stores it in a host memory buffer, and generates parity bits to validate the data before writing it to a second portion, ensuring data integrity by comparing parity bits and performing corrections as necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is stored in a host memory buffer during relocation operations, then data can be temporarily held for relocation, but the data may become corrupted or overwritten resulting in incorrect data being written to the memory device

Engineering Contradiction:
Improvedata relocation efficiencyVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary actions by storing both the original data and parity bits in the host memory buffer before the write operation. This allows validation to be performed before the actual data is written to the memory device, preventing corrupted data from being written while maintaining efficient relocation operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by reading back the data from the host memory buffer and comparing it against the stored parity bits. This feedback mechanism detects whether the data was corrupted or overwritten during the relocation process, allowing the system to identify and correct errors before final writing to the memory device.

Inventive Principle:
Principle #23Feedback

2Speed

If data is read from the host memory buffer without validation, then the relocation operation can proceed quickly, but corrupted or overwritten data may be written to the memory device

Engineering Contradiction:
Improvedata relocation speedVSAvoiddata accuracy
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The validation process is performed as a preliminary action before the final write operation. By checking data integrity against parity bits before writing to the memory device, the system ensures data accuracy without significantly impacting the overall relocation speed, as the validation occurs in the host memory buffer rather than during the actual memory write.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system replaces physical re-reading of data from the memory device with a computational validation method using parity bits stored in the host memory buffer. This substitution allows for faster validation since it operates on data already in the buffer rather than requiring additional read cycles from the slower memory device.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10567006B2Data relocation
Publication Date: 2020.02.18 SANDISK TECHNOLOGIES LLC
  • US10567006B2 patent drawing
  • US10567006B2 patent drawing
  • US10567006B2 patent drawing

AI summary

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured, during execution of a relocation operation that includes storage of data to a memory buffer of an access device and retrieval of the data including data bits and first error correction code (ECC) parity bits from the memory buffer, to generate second ECC parity bits based on the data bits from the memory buffer and to compare the first ECC parity bits to the second ECC parity bits.