Segmented ECC Check Matrix for Nonvolatile Memory Data Extension
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Solution Overview
Problem
Existing nonvolatile memory technologies face inefficiencies when trying to extend or increase uneraseable data protected by an error-correcting code, as they often require copying or erasing existing data, which is wasteful and resource-intensive.
Innovation Solution
A specially designed error-correcting code and check matrix that allows sets of input data bits to generate ECC bits independently and in arbitrary order, enabling data extension without erasing or copying existing bits, using a check matrix constructed for EXCLUSIVE-OR operations that produce logical '0' or '1' results based on column configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional ECC methods are used to protect uneraseable data in nonvolatile memory, then data integrity is maintained, but data extension requires erasing or copying existing data which is resource-intensive and inefficient
Solution Approach 1:
The patent segments the check matrix into distinct column groups, where each group corresponds to a specific data bit position. This segmentation allows independent ECC bit generation for each data bit without requiring global ECC recalculation, enabling efficient data extension without erasing existing data.
Solution Approach 2:
The patent pre-configures the check matrix with predetermined column structures that enable direct ECC bit generation for new data. This preliminary arrangement allows new data to be written with generated ECC bits without requiring prior erasure or copying operations, thus improving productivity and reducing energy loss.
2Ease of operation
If conventional ECC methods are used, then error protection is provided, but updating uneraseable data requires copying to new memory locations increasing device complexity
Solution Approach 1:
By segmenting the check matrix into independent column groups, the patent enables straightforward ECC bit generation for new data positions. This simplifies the data update operation as new data can be written sequentially without complex memory management or copying operations, reducing device complexity while maintaining ease of operation.
Solution Approach 2:
Instead of the conventional approach of erasing old data and writing new data to the same location (or copying to new locations), the patent inverts the approach by generating ECC bits that accommodate new data directly in place, allowing uneraseable data to be extended without movement or copying, thus simplifying operations and reducing complexity.
3Adaptability or versatility
If standard ECC check matrices are used, then error correction capability is achieved, but independent ECC bit generation for data extension is not possible
Solution Approach 1:
The patent divides the check matrix into multiple column groups where each group can be independently processed to generate corresponding ECC bits. This segmented structure provides adaptability for data extension while maintaining a systematic and manageable check matrix design, avoiding excessive device complexity.
Solution Approach 2:
The patent designs a universal check matrix structure that serves multiple functions: it provides standard error correction capability while also enabling independent ECC bit generation for data extension operations. This multi-functionality increases adaptability without proportionally increasing device complexity.
Data Source
AI summary
An embodiment of the invention relates to a memory device and a related method. In an embodiment, a check matrix for an error-correcting code is formed so that sets of input data bits can be written, wherein each set of input data bits generates one set of error-correcting code bits that can be written independently of each other and in an arbitrary order. An error-correcting code is thereby produced without the need to erase or copy any existing, originally written bit upon presentation of new input data.