ECC Check Code Offloading for Smaller Receiving Terminals

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Solution Overview

Problem

Existing data error correction systems in integrated circuits require a large number of circuit elements and occupy significant layout area, which poses a challenge in reducing the requirements on the data receiving terminal without compromising error correction accuracy.

Innovation Solution

A data error correction circuit and method that generates a second check code directly in the memory, which includes a full check value, allowing the data receiving terminal to perform error correction without the need for additional circuit elements or layout area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a link ECC is implemented in the data receiving terminal to perform error correction on received data, then error correction accuracy is improved, but the number of circuit elements and layout area increase

Engineering Contradiction:
Improveerror correction accuracyVSAvoidnumber of circuit elements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the second check code generation function from the data receiving terminal and relocates it to the memory device. Specifically, the memory device generates a second check code based on the first check code and transmitted data, then transmits both the data and second check code to the receiving terminal. This extraction removes the complex generation circuitry from the receiving terminal while maintaining error correction capabilities.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies preliminary action by having the memory device generate the second check code in advance before data transmission. The second check code is prepared and transmitted along with the data, so that the data receiving terminal can directly use it for error correction without needing to perform complex real-time generation operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a link ECC is implemented in the data receiving terminal to perform error correction on received data, then error correction accuracy is improved, but the layout area increases

Engineering Contradiction:
Improveerror correction accuracyVSAvoidlayout area of data receiving terminal
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the second check code generation function from the data receiving terminal and relocates it to the memory device. Specifically, the memory device generates a second check code based on the first check code and transmitted data, then transmits both the data and second check code to the receiving terminal. This extraction removes the complex generation circuitry from the receiving terminal while maintaining error correction capabilities.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If the full check value is generated according to each bit of the data and each bit of the first check code in the data receiving terminal, then error correction accuracy is improved, but the functional requirements and circuit complexity increase

Engineering Contradiction:
Improveerror correction accuracyVSAvoidcircuit functions of data receiving terminal
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the second check code generation function from the data receiving terminal and relocates it to the memory device. Specifically, the memory device generates a second check code based on the first check code and transmitted data, then transmits both the data and second check code to the receiving terminal. This extraction removes the complex generation circuitry from the receiving terminal while maintaining error correction capabilities.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies preliminary action by having the memory device generate the second check code in advance before data transmission. The second check code is prepared and transmitted along with the data, so that the data receiving terminal can directly use it for error correction without needing to perform complex real-time generation operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12323161B2Error correction circuit and data transmission method
Publication Date: 2025.06.03 CHANGXIN MEMORY TECH INC
  • US12323161B2 patent drawing
  • US12323161B2 patent drawing
  • US12323161B2 patent drawing

AI summary

A data error correction circuit includes: a data error correction circuit, configured to receive first data and a first check code corresponding to the first data, perform error correction on the first data according to the first check code to generate second data, and output the second data; and a check code generation circuit, configured to receive the first data and the first check code, generate a second check code according to the first data and the first check code, and output the second check code.