ECC Circuitry Checker for Memory Reliability Validation
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Solution Overview
Problem
In embedded computing systems, particularly those requiring high safety levels like automotive applications, there is a need to verify that error detection mechanisms are functioning correctly, as defects in error detection circuitry may go undetected during manufacturing and could fail to detect errors intended to be caught.
Innovation Solution
Incorporating an ECC circuitry checker that substitutes actual ECC data with check ECC data and compares the output to an expected result, generating an alert if errors are detected, thereby validating the operation of ECC encoding and decoding circuitry, and potentially using bit flip logic or data generation logic to simulate errors for verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC circuitry is added to detect errors in memory data, then error detection capability is improved, but device complexity increases
Solution Approach 1:
The ECC circuitry checker is nested within the memory device structure, with the checker integrated into the existing memory architecture. The checker uses the memory array itself to store check ECC data, and leverages the existing ECC encoding/decoding circuitry rather than adding completely separate validation systems. This nesting approach enables ECC validation functionality while minimizing additional device complexity.
2Reliability
If ECC circuitry checker is implemented to validate error detection, then reliability is improved, but device complexity increases
Solution Approach 1:
The ECC circuitry checker performs self-validation by using the memory device's own resources. The checker retrieves check ECC data from the memory array, substitutes it with actual ECC data from memory operations, and validates the ECC circuitry's output against expected results. This self-service approach enables validation functionality without requiring external testing equipment or additional complex validation circuitry.
Solution Approach 2:
The checker temporarily discards the actual ECC data generated by the ECC circuitry and replaces it with check ECC data retrieved from the memory array. After validation, the system recovers by comparing the substituted check data's expected output with the actual ECC circuitry output. This discarding and recovering mechanism enables validation while maintaining normal ECC functionality.
3Reliability
If check ECC data is stored in memory array, then validation capability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The check ECC data is pre-stored in the memory array at specific memory addresses during manufacturing or initialization. The ECC circuitry checker translates validation addresses to the appropriate memory address mapped portions where check ECC data is stored. This preliminary action of pre-storing validation data enables the checker to retrieve and use check ECC data without requiring complex real-time generation or external input mechanisms.
Data Source
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AI summary
A memory device comprising a memory array including memory cells to store memory data, error correcting code (ECC) circuitry configured to generate ECC data and use the ECC data to detect errors in the memory data, and an ECC circuitry checker. The ECC circuitry checker is configured to substitute the ECC data with check ECC data, compare an output of the ECC circuitry to an expected output when the substituted check ECC data is applied to the ECC circuitry, and generate an alert when the comparing indicates an error in the ECC circuitry.