ECC Code Rate Adaptation for Flash Memory Error Variability

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Solution Overview

Problem

Adaptive error correction codes (ECC) in storage devices, such as flash memory and solid state drives, face limitations in adjusting ECC strength to cope with varying error rates, often resulting in catastrophic performance degradation and data loss due to inability to weaken ECC after strengthening and incremental single-level adjustments.

Innovation Solution

Implementing a method to bi-directionally adjust ECC strength, allowing movement to stronger or weaker ECC levels beyond single-level increments, using a maximum fail-bit count as an adaptation trigger and maintaining a correction margin to select the weakest ECC sufficient for error correction, enabling flexible code rate adaptation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC strength is increased to correct more errors, then reliability is improved, but storage space utilization deteriorates

Engineering Contradiction:
Improveerror correction capabilityVSAvoidstorage space utilization
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent implements dynamic ECC strength adjustment by monitoring error rates and adapting the code rate accordingly. The system transitions from a static ECC configuration to a dynamic one where the ECC strength is adjusted in real-time based on actual error conditions, allowing the system to use stronger ECC only when necessary and weaker ECC when error rates are low, thus optimizing storage space utilization while maintaining reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the code rate parameter to adjust ECC strength. By modifying the code rate (the ratio of data bits to total bits in an ECC codeword), the system can dynamically alter error correction capability. Lower code rates provide stronger error correction but reduce storage efficiency, while higher code rates improve storage efficiency but provide weaker error correction. The system adapts this parameter based on monitored error rates.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If single-level incremental ECC adjustments are used, then device complexity is reduced, but adaptability deteriorates

Engineering Contradiction:
ImproveECC adjustment mechanismVSAvoidcode rate adaptation flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent enables multi-level ECC adjustments by allowing the code rate index to be incremented or decremented by more than one level at a time. This dynamic adjustment capability allows the system to rapidly adapt to changing error conditions, moving between different ECC strength levels as needed, thereby significantly improving adaptability while maintaining relatively simple device complexity through algorithmic control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11133831B2Code rate adaptation
Publication Date: 2021.09.28 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US11133831B2 patent drawing
  • US11133831B2 patent drawing
  • US11133831B2 patent drawing

AI summary

A method includes programming data in a block of a storage device, and reading back the programmed data and determining a maximum error count for the block. A code rate index that satisfies correction of the maximum error count for the block is determined. A current code rate index is adjusted to the code rate index that satisfies correction of the maximum error count for the block.