ECC Code Word Interleaving for Cluster Error Correction
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Solution Overview
Problem
Existing non-volatile memory systems face challenges in correcting cluster error bit errors, which reduces the effective error correction capability and leads to uncorrectable data errors, especially in situations where error bits are clustered.
Innovation Solution
The method involves identifying cluster error locations in ECC code words, altering bit values, and feeding the altered ECC code words into ECC circuitry to determine if they can be successfully decoded, and employing code word interleaving to distribute ECC capability non-uniformly across memory cells, allowing for more effective error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ECC techniques are used to correct random error bits, then a certain number of random errors can be corrected, but cluster error bits cannot be corrected effectively
Solution Approach 1:
The patent segments the ECC code word into multiple groups or sub-codes, allowing different correction strategies to be applied to different segments. This segmentation enables the system to handle cluster errors by treating them as localized problems within specific segments rather than requiring correction across the entire code word, thereby improving reliability for cluster error patterns while maintaining adaptability.
Solution Approach 2:
The patent applies local quality by using non-uniform ECC distribution where different portions of the code word receive different levels of error correction protection. Specifically, certain bits or groups of bits that are more prone to clustering errors are allocated additional ECC resources or placed in regions with higher correction capability, allowing the system to effectively handle cluster errors while optimizing overall error correction performance.
2Ease of manufacture
If ECC capability is distributed uniformly across all code words, then simple implementation is achieved, but effective correction of cluster errors is reduced
Solution Approach 1:
The patent implements non-uniform ECC distribution by allocating different numbers of ECC bits to different code words or code word groups based on their error characteristics. This allows regions more susceptible to cluster errors to receive enhanced protection while maintaining simpler ECC schemes for less vulnerable regions, thereby improving cluster error correction reliability without excessively complicating the overall implementation.
Solution Approach 2:
The patent changes the ECC parameters dynamically or statically across different code words, such as varying the code rate, block length, or correction capability based on the position or content of the code word. This parameter variation enables the system to optimize error correction for cluster-prone regions while maintaining ease of implementation through predefined parameter sets or lookup tables.
3Reliability
If more ECC bits are allocated to correct cluster errors, then cluster error correction improves, but overall storage capacity decreases
Solution Approach 1:
The patent applies local quality by concentrating additional ECC bits only in specific regions or for specific code words that are more vulnerable to cluster errors, rather than uniformly increasing ECC across all data. This localized enhancement improves cluster error correction where needed while minimizing the impact on overall storage capacity, as only portions of the data require the enhanced protection.
Solution Approach 2:
The patent employs partial action by applying enhanced ECC correction capability only to the extent necessary for correcting cluster errors, rather than providing maximum correction capability throughout. This allows the system to achieve sufficient cluster error correction with minimal overhead, preserving storage capacity while addressing the specific problem of clustered bit errors.
Data Source
AI summary
Techniques are presented for dealing with errors that arise from cluster fails, where a number of memory cells in the same area fail. An ECC code word can tolerate a given total amount of error while still being able to still be decoded, so that if error due to clusters can be identified and removed or lessened, it may be possible to still decode the word not otherwise decodable. After identifying possible error bit cluster locations, one or more bits in the cluster locations are flipped to see if the data content of the code word can be extracted. For embodiments using LDPC ECC code, uncertainty can be added for the bits of a suspected cluster location. To reduce the effects of cluster failures, code words can be interleaved within a page and the difference code words can have differing levels of ECC capability.