ECC Decoder Handling Forbidden PAM3 States to Limit Error Propagation
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Solution Overview
Problem
In data transmission and storage systems, such as PAM3 interfaces and memory structures, single error correction double error detection (SECDED) ECC is insufficient in handling transfer errors, leading to increased error propagation due to the presence of multiple states in bit transmission.
Innovation Solution
An error correction method and circuit utilizing a decoder and ECC engine that determines if an input analog code is in a forbidden state, setting or resetting a digital binary code accordingly, and performing ECC operations to correct errors, enhancing error correction performance by managing errors in a predetermined code sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SECDED ECC is used for error correction in multi-state bit transmission, then single error correction capability is provided, but error propagation increases due to inability to handle transfer errors effectively
Solution Approach 1:
The decoder performs preliminary detection of forbidden states in analog codes before ECC processing. By identifying forbidden states (e.g., '11' in PAM3) upfront and converting them to predetermined digital codes, the system prevents these problematic states from propagating through the ECC engine, thereby reducing error propagation while maintaining correction capability.
Solution Approach 2:
The system changes the parameter representation by converting analog codes with forbidden states into digital binary codes with predetermined values. This parameter transformation allows the ECC engine to handle errors more effectively by working with a code structure that eliminates forbidden state ambiguities, thus improving reliability without increasing error propagation.
2Productivity
If analog codes with forbidden states are directly processed by ECC engine, then processing speed is maintained, but error correction performance deteriorates
Solution Approach 1:
The error correction process is segmented into two distinct stages: (1) decoder stage that detects and converts forbidden states to predetermined codes, and (2) ECC engine stage that performs error correction on the pre-processed digital codes. This segmentation allows each stage to optimize for its specific function, maintaining overall processing speed while improving error correction performance.
Solution Approach 2:
The decoder performs preliminary processing by detecting forbidden states and converting them to predetermined digital codes before the ECC engine processes the data. This preliminary action removes problematic forbidden states that would otherwise degrade ECC performance, allowing the system to maintain high processing speed while achieving better error correction.
3Device complexity
If decoder converts all analog codes directly to digital binary codes, then processing is simplified, but forbidden states cause errors in the binary result
Solution Approach 1:
The decoder applies different processing quality to different input states: forbidden states (e.g., '11') are detected and converted to specific predetermined codes, while non-forbidden states are converted to their natural binary equivalents. This local differentiation ensures that problematic forbidden states do not corrupt the binary result, while maintaining simplicity for the majority of valid input states.
Data Source
AI summary
An error correction method comprises: when a decoder determines that an input analog code is at a forbidden state, setting a digital binary code as a first predetermined code and inputting the digital binary code to an ECC engine; determining whether the digital binary code has no error or two errors; when the digital binary code has no error, outputting the digital binary code after ECC by the ECC engine; when the digital binary code has two errors, resetting the digital binary code as a second predetermined code and inputting the digital binary code to the ECC engine for ECC; and when the decoder determines that the input analog code is not at the forbidden state, decoding the input analog code into the digital binary code and inputting the digital binary code to the ECC engine for ECC.


