ECC Decoder Pipeline with Out-of-Order Frame Completion

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Solution Overview

Problem

Newer ECC decoder designs with variable latency lead to long delays and large memory requirements, especially when sectors with errors are close together, as they require storing incoming data until processing is complete, causing inefficiencies in data processing.

Innovation Solution

Implementing an out-of-order processing method where data can be processed through different stages simultaneously, reducing memory needs and processing time by allowing data frames to be processed in stages without waiting for all previous frames to finish, and using management processes to maintain data order downstream.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If data is processed in sequential order through the ECC decoder, then data ordering is maintained, but processing latency increases and memory requirements increase

Engineering Contradiction:
Improveprocessing latencyVSAvoidmemory requirements
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the data processing into multiple independent stages (parsing stage, first decoding stage, second decoding stage) that can operate simultaneously on different data frames. Each stage processes data independently, allowing parallel execution and reducing overall latency without requiring large memory buffers to maintain sequential order.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic data frame management where the system adaptively processes data frames out of sequential order based on processing availability. Data frames are dynamically assigned to different stages, and the system flexibly manages the flow of data through the pipeline, allowing earlier frames to be processed after later frames when appropriate, thereby reducing latency.

Inventive Principle:
Principle #15Dynamics

2Productivity

If data frames are processed simultaneously through different stages, then processing speed increases, but data ordering management becomes more complex

Engineering Contradiction:
Improveprocessing speedVSAvoiddata management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces intermediary components including a data frame parser that prepares data frames for processing and a data management process that coordinates between stages. These intermediaries handle the complexity of maintaining data order while enabling simultaneous processing, acting as mediators that manage the flow and ordering of data frames through the parallel stages.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements feedback mechanisms where the data management process monitors the processing status of data frames and dynamically adjusts the processing order. The system receives feedback about which stages are available and which data frames are ready, using this information to optimize the processing sequence and maintain proper data ordering despite parallel execution.

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If memory buffers are increased to maintain data order during parallel processing, then data ordering is preserved, but memory requirements increase

Engineering Contradiction:
Improvedata order maintenanceVSAvoidmemory capacity
Core Design Contradiction:
Stability of the object's compositionVSQuantity of substance

Solution Approach 1:

The patent segments the data processing into multiple independent stages that can operate simultaneously on different data frames. Each stage processes data independently, allowing parallel execution and reducing overall latency without requiring large memory buffers to maintain sequential order.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables data frames to effectively manage their own processing through the pipeline with minimal external coordination. Each data frame progresses through stages based on availability and processing needs, with the system self-regulating to maintain order without requiring extensive memory buffering or complex external control mechanisms.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8281212B1Iterative ECC decoder with out of order completion
Publication Date: 2012.10.02 SK HYNIX MEMORY SOLUTIONS AMERICA INC
  • US8281212B1 patent drawing
  • US8281212B1 patent drawing
  • US8281212B1 patent drawing

AI summary

Processing a sequence of data frames in an error correction code (ECC) decoder is disclosed. Processing includes receiving a first data frame in the sequence of data frames, storing the first data frame, initiating processing of the first data frame using the ECC decoder that includes a faster stage and a slower stage, receiving a second data frame from the input sequence of data frames, storing the second data frame, and initiating processing of the second data frame through the ECC decoder before the first data frame is finished being processed using the ECC decoder.