ECC Decoder Resource Sharing for Multi-Channel Error Correction
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Solution Overview
Problem
Existing error correction methods for data transmission over communication channels are inefficient as they require parallel processing across multiple channels, leading to increased power consumption and latency due to the need for simultaneous syndrome determination, key equation solving, and Chien search operations.
Innovation Solution
An error correction code (ECC) decoder architecture that operates independently of communication channels, utilizing a syndrome determination block, a key equation solver (KES) block, and a Chien search block, with a controller to manage processing elements and prioritize operations based on channel state, allowing for reduced processing elements and efficient error location polynomial and root determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parallel processing is used across multiple channels for error correction, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic resource allocation where processing elements (syndrome determination block, KES block, Chien search block) are shared across multiple channels based on real-time needs. Instead of dedicating separate processing elements to each channel, the system dynamically assigns available processing resources to channels that require error correction, thereby reducing overall power consumption while maintaining error correction capability.
Solution Approach 2:
The patent creates universal processing blocks that can serve multiple channels. The syndrome determination block, key equation solver block, and Chien search block are designed as shared resources that can process data from any channel, making the error correction system multi-functional and reducing the total number of processing elements needed, thus lowering power consumption.
2Reliability
If parallel processing is used across multiple channels for error correction, then error correction capability is improved, but latency increases
Solution Approach 1:
The patent ensures continuous error correction processing by implementing a queue mechanism and state management system. When a processing element becomes available, it immediately processes the next channel's data that requires error correction. This continuous operation eliminates idle time and reduces overall latency while maintaining the ability to handle multiple channels.
Solution Approach 2:
The patent performs preliminary syndrome determination for all channels first, then queues the results for subsequent KES and Chien search operations. This preliminary action allows the system to prepare data in advance and process it efficiently when processing elements become available, reducing overall latency.
3Productivity
If separate processing elements are allocated to each channel, then processing efficiency is improved, but device complexity increases
Solution Approach 1:
The patent merges the error correction processing functions across multiple channels into shared processing blocks. Instead of having separate syndrome determination blocks, KES blocks, and Chien search blocks for each channel, the system combines these functions into unified processing elements that serve multiple channels, thereby reducing device complexity while maintaining processing efficiency through proper resource management.
4Device complexity
If shared processing elements are used across multiple channels, then device complexity is reduced, but processing speed decreases
Solution Approach 1:
The patent segments the error correction process into distinct stages (syndrome determination, key equation solving, Chien search) that can be executed sequentially or in parallel depending on resource availability. This segmentation allows shared processing elements to work efficiently on different stages for different channels without conflict, maintaining processing speed while reducing device complexity.
Data Source
AI summary
An error correction code (ECC) decoder processing data read from a storage media includes a plurality of processing elements for detecting an error in at least one of a plurality of channel data, wherein the plurality of channel data is received via a plurality of channels, and wherein the plurality of processing elements are driven independently from the plurality of channels.


