ECC Decoding Retry Using Flip Read Voltages in NAND Memory

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Solution Overview

Problem

Nonvolatile memory devices face errors due to distortion in threshold voltage distributions during programming, leading to read failures, as charge leakage, program disturbances, and other factors cause unintended shifts and broadening of these distributions, resulting in incorrect data retrieval.

Innovation Solution

A method of error correction code (ECC) decoding that involves reading normal data and flip data based on different voltages, inverting error candidate bits within a determined flip range, and performing subsequent ECC decoding to correct and enhance data reliability, utilizing a memory controller with a data regenerator and ECC decoder to retry decoding until successful.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If normal read voltage is used for reading data, then read speed is fast, but error rate increases due to threshold voltage distortion

Engineering Contradiction:
Improveread speedVSAvoiddata accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a first ECC decoding on normal read data before final data output. When the first decoding fails, the system proactively generates corrected read data by inverting error candidate bits based on flip read data, then performs a second ECC decoding. This preliminary error correction process ensures that data accuracy is maintained without sacrificing read speed, as the correction is performed conditionally only when needed.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If flip read voltage is used to read data, then error correction capability improves, but read speed decreases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidread speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies partial action by using flip read voltage selectively rather than continuously. The system first attempts to decode normal read data, and only when that fails does it invoke the flip read voltage-based correction process. This partial application of the slower but more reliable flip read method minimizes the impact on overall read speed while still providing enhanced error correction capability when needed.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If ECC decoding is performed on normal read data, then data retrieval is fast, but decoding failure occurs due to errors

Engineering Contradiction:
Improvedata retrieval efficiencyVSAvoiddecoding success rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies feedback by using the result of the first ECC decoding to determine whether to proceed with error correction. When the first decoding fails, the system feeds back this failure information and activates the error correction process that generates corrected read data by inverting error candidate bits. The corrected data then undergoes a second ECC decoding attempt. This feedback mechanism ensures high decoding success rate while maintaining efficiency by avoiding unnecessary correction steps.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12080366B2Method of error correction code (ECC) decoding and memory system performing the same
Publication Date: 2024.09.03 SAMSUNG ELECTRONICS CO LTD
  • US12080366B2 patent drawing
  • US12080366B2 patent drawing
  • US12080366B2 patent drawing

AI summary

In a method of error correction code (ECC) decoding, normal read data are read from a nonvolatile memory device based on normal read voltages, and a first ECC decoding is performed with respect to the normal read data. When the first ECC decoding results in failure, flip read data are read from the nonvolatile memory device based on flip read voltages corresponding to a flip range of a threshold voltage. Corrected read data are generated based on the flip read data by inverting error candidate bits included in the flip range among bits of the normal read data, and a second ECC decoding is performed with respect to the corrected read voltage. Error correction capability may be enhanced by retrying ECC decoding based on the corrected read data when ECC decoding based on the normal read data results in failure.