ECC Decoding Circuitry Syndrome Bit Weighting

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Solution Overview

Problem

Existing data storage systems face challenges in effectively detecting and correcting errors, particularly when errors affect both data bits and address bits, due to the conventional approach of using error correction codes (ECCs) that require an odd number of bits of the syndrome value to depend on each bit of the decoding input value.

Innovation Solution

The proposed solution involves an ECC decoding circuitry that generates a syndrome value by performing an ECC decoding operation on a decoding input value comprising data bits, code bits, and address bits. This circuitry determines the syndrome value such that each bit depends on a different combination of bits, with an odd number of bits depending on each data bit and an even number depending on each address bit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ECC schemes use an odd number of syndrome bits for each input bit, then single-bit error correction is achieved, but multi-address-bit error detection capability is limited

Engineering Contradiction:
Improveerror detection rateVSAvoidECC scheme complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by differentiating the treatment of data bits and address bits in the syndrome calculation. Data bits use odd-weight columns for single-bit error correction, while address bits use even-weight columns specifically for multi-address-bit error detection. This localized differentiation optimizes each component's function without requiring complete scheme redesign.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the syndrome bits into different functional groups: some syndrome bits are dedicated to data bit error detection (odd-weight columns) while others are dedicated to address bit error detection (even-weight columns). This segmentation allows independent optimization of error correction and error detection capabilities.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If standard ECC codes are used, then implementation simplicity is maintained, but the maximum number of protected data bits is limited

Engineering Contradiction:
Improvenumber of protected data bitsVSAvoidimplementation simplicity
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent changes the parameter of column weights in the parity check matrix from uniformly odd to a mixed scheme where data bit columns remain odd-weight but address bit columns are even-weight. This parameter change enables protection of more data bits while maintaining implementation simplicity through systematic matrix construction rules.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If ECC protects both data bits and address bits uniformly, then comprehensive error protection is achieved, but error detection precision for different error types deteriorates

Engineering Contradiction:
Improveerror detection precisionVSAvoidECC structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements local quality by assigning different column weight properties to different portions of the parity check matrix. Columns corresponding to data bits use odd weights for precise single-bit error detection, while columns for address bits use even weights for precise multi-bit error detection. This local differentiation achieves high detection precision without requiring complex hybrid schemes.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12277028B2Error correction code
Publication Date: 2025.04.15 ARM LTD
  • US12277028B2 patent drawing
  • US12277028B2 patent drawing
  • US12277028B2 patent drawing

AI summary

An apparatus comprises a storage configured to store data items associated with error correction codes (ECCs); data retrieval circuitry responsive to a data retrieval request specifying a retrieval address to retrieve a retrieved data item and an associated ECC from a storage location corresponding to the retrieval address; and ECC decoding circuitry to generate a syndrome value by performing an ECC decoding operation on a decoding input value comprising data bits of the retrieved data item, code bits of the associated ECC, and address bits of the retrieval address, and to determine based on the syndrome value whether an error condition has occurred. Each bit of the syndrome value depends on a different combination of bits of the decoding input value. For each data bit of the decoding input value, an odd number of bits of the syndrome value depend on that data bit. For each address bit of the decoding input value, an even number of bits of the syndrome value depend on that address bit.