Fixed-Capability ECC Engine with Product Codes for Memory Reliability
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Solution Overview
Problem
Existing memory systems face inefficiencies due to the complexity and increased area occupied by reconfigurable error correction code (ECC) engines, which are designed to handle various error correction levels, leading to reduced integration density and limited flexibility in responding to unexpected operational situations.
Innovation Solution
A memory system with a non-reconfigurable ECC engine that operates at a fixed error correction level, switching to a higher level only when necessary, using row and column product codes to enhance error correction capabilities without increasing circuit complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the error correction capability of the ECC engine is increased to improve reliability, then the stability of the memory system is improved, but the circuit complexity and area occupied by the ECC engine increases
Solution Approach 1:
The error correction operation is segmented into two distinct modes: a first error correction mode using the fixed-capability ECC engine for routine operations, and a second error correction mode using product codes (row and column parity) for scenarios requiring higher correction capability. This segmentation allows the system to achieve high reliability when needed while maintaining simple circuitry for normal operation.
Solution Approach 2:
The system dynamically selects between two error correction modes based on the detected number of erroneous bits. When the number of errors exceeds the fixed ECC engine's capability, the system transitions to the product code-based second mode, providing adaptive error correction capability without requiring a permanently complex circuit design.
2Adaptability or versatility
If the ECC engine is designed with reconfigurable scheme to handle multiple error correction levels, then the adaptability is improved, but the area occupied by the ECC engine and its complexity increases
Solution Approach 1:
The fixed-capability ECC engine is made universal by combining it with product code capabilities. The same ECC engine handles both the first error correction mode (direct correction) and assists in the second mode by correcting row and column product codes, eliminating the need for multiple dedicated ECC engines for different correction levels.
Solution Approach 2:
Product codes (row and column parity bits) serve as an intermediary mechanism that bridges the gap between the fixed ECC engine capability and the need for higher error correction levels. The product codes enable the system to achieve reconfigurable-like flexibility without requiring a reconfigurable ECC engine, as the parity structure naturally supports variable correction scenarios.
3Reliability
If the ECC engine is designed with reconfigurable scheme to prepare for worst scenario, then the reliability is improved, but the area occupied by the ECC engine increases inefficiently
Solution Approach 1:
Instead of designing the ECC engine for excessive correction capability to cover all worst-case scenarios, the system applies partial correction using the fixed ECC engine for typical cases and reserves product code mechanisms for extreme scenarios. This partial action approach achieves worst-case preparedness without the area overhead of designing for maximum capability from the start.
Data Source
AI summary
A memory system includes a memory medium and a memory controller. The memory medium includes data symbols and parity symbols which are respectively disposed at cross points of a plurality rows and a plurality of columns. The memory controller includes an error correction code (ECC) engine that is designed to execute an error correction operation at a fixed error correction level while the memory controller accesses the memory medium. The memory controller performs the error correction operation at the fixed error correction level using the ECC engine in a first error correction mode. The memory controller performs the error correction operation at an error correction level higher than the fixed error correction level using the ECC engine in a second error correction mode.