On-die ECC Error Counter with Baseline Difference Generation

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Solution Overview

Problem

Current memory devices lack a mechanism to reveal information about the accumulation of errors within the device without exposing proprietary information about internal error correction and manufacturing processes.

Innovation Solution

A memory device that performs internal error detection, increments an internal count for each error detected, and generates an error result indicating the difference between the internal count and a baseline number of errors, allowing it to provide this information to a host system without exposing internal error correction details.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory device provides internal error correction mechanisms, then bit failures are mitigated, but the device lacks a mechanism to reveal error accumulation information without exposing proprietary manufacturing details

Engineering Contradiction:
Improveerror mitigationVSAvoiderror accumulation information
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent extracts only the necessary error accumulation information from the internal ECC mechanisms. The memory device internally tracks error counts but only exposes the difference between current and baseline error counts to the host system, leaving the proprietary baseline information hidden within the device.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary mechanism (the error count difference calculation and selective exposure system) that mediates between the internal error correction processes and the host system. This intermediary allows error accumulation monitoring while filtering out proprietary manufacturing information.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the memory device exposes internal error correction information, then error accumulation can be monitored, but proprietary manufacturing information is revealed

Engineering Contradiction:
Improveerror accumulation monitoringVSAvoidproprietary information exposure
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent extracts only the relevant error accumulation data (the difference value) from the complete internal error information. The host system receives only the change in error count since manufacturing, not the absolute error count that would reveal manufacturing quality baselines.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different information disclosure policies to different parts of the error data. Internal error counts remain private (manufacturing information), while the incremental error count difference is made accessible (operational information), creating a localized quality in information transparency.

Inventive Principle:
Principle #3Local quality

3Reliability

If the memory device tracks all internal errors, then complete error information is available, but the device complexity increases

Engineering Contradiction:
Improveerror tracking accuracyVSAvoiderror management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential error tracking function needed for reliability monitoring. By maintaining internal error counts for complete tracking while extracting only the difference value for external communication, the system achieves accurate error monitoring without proportionally increasing external interface complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP3712893B1On-die ECC with error counter and internal address generation
Publication Date: 2025.01.22 INTEL CORP
  • EP3712893B1 patent drawingFigure 1~2
  • EP3712893B1 patent drawingFigure 3
  • EP3712893B1 patent drawingFigure 4

AI summary

A memory subsystem enables managing error correction information. A memory device internally performs error detection for a range of memory locations, and increments an internal count for each error detected. The memory device includes ECC logic to generate an error result indicating a difference between the internal count and a baseline number of errors preset for the memory device. The memory device can provide the error result to an associated host of the system to expose only a number of errors accumulated without exposing internal errors from prior to incorporation into a system. The memory device can be made capable to generate internal addresses to execute commands received from the memory controller. The memory device can be made capable to reset the counter after a first pass through the memory area in which errors are counted.