ECC Memory Scrubbing via Scrub Transactions for Low-Overhead Reliability
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Solution Overview
Problem
Existing memory scrubbing techniques in data processing systems can adversely affect system performance and fail to ensure data reliability in memory locations left untouched for long periods, as they rely on frequent memory access and may not effectively correct multiple bit errors.
Innovation Solution
A data processing apparatus that uses a scrub transaction to initiate a data scrubbing process, allowing the data scrubbing unit to perform error correction without involving the processor unit, thereby reducing processor load and avoiding unnecessary cache state changes and snoop requests, and enabling flexible scheduling of the scrubbing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory scrubbing is performed frequently to correct errors before they accumulate, then data reliability is improved, but system performance deteriorates due to processor involvement and memory access overhead
Solution Approach 1:
The patent extracts the memory scrubbing function from the processor unit and implements it as a separate background thread. This allows error correction operations to be performed independently without blocking or interfering with the processor's primary data processing tasks, thus maintaining both data reliability and system performance
Solution Approach 2:
The background scrubbing thread performs error detection and correction in advance before errors can accumulate into uncorrectable multi-bit errors. By continuously monitoring and correcting single-bit errors proactively, the system maintains data reliability without requiring frequent interrupt-driven scrubbing that would impact performance
2Reliability
If memory scrubbing involves the processor unit reading and writing memory locations, then error correction is achieved, but processor load increases and cache state changes occur
Solution Approach 1:
The background scrubbing thread operates autonomously to perform memory error correction without requiring processor unit involvement. The thread independently reads memory locations, detects errors using ECC, corrects single-bit errors, and writes back corrected data, thereby reducing processor load and avoiding unnecessary cache state changes
Solution Approach 2:
The patent introduces a background thread as an intermediary between the processor unit and memory scrubbing operations. This intermediary handles all error correction tasks, allowing the processor to focus on data processing while the background thread manages memory reliability, thus reducing overall system complexity
3Reliability
If entire memory is scrubbed periodically to ensure all locations are checked, then data reliability is improved, but time consumption increases
Solution Approach 1:
The scrubbing system performs partial scrubbing operations on subsets of memory rather than requiring complete memory scans. The background thread can target specific memory regions or perform incremental scrubbing, achieving sufficient error coverage without the time penalty of exhaustive full-memory scanning
Data Source
AI summary
A data processing apparatus is provided which comprises a processor unit configured to perform data processing operations in response to a sequence of instructions and a storage unit configured to store data values for access by the processor unit when performing its data processing operations. Redundant error control data is stored in association with the data values, the redundant error control data enabling identification of an error in the data values. The data processing apparatus also comprises a data scrubbing unit configured to perform a data scrubbing process on at least a subset of the data values, the data scrubbing process comprising determining with reference to the redundant error control data if an error is present in that subset of data values and, where possible, correcting that error with reference to the redundant error control data. The data scrubbing unit is configured to receive a scrub transaction issued within said data processing apparatus, and to perform the data scrubbing process upon receipt of the scrub transaction.