ECC Memory Partial-Write Buffering Without Read-Modify-Write

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Solution Overview

Problem

Partial writes in ECC-enabled memories require additional cycles due to the need for read-modify-write operations, which impact system throughput and increase area overhead, especially when access sizes are less than the memory word size.

Innovation Solution

A memory system with a data buffer that stores a full data word after a partial write operation, allowing subsequent partial writes to read from the buffer instead of the memory, thereby eliminating the need for read-modify-write operations and reducing cycle time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read-modify-write operation is used for partial writes to ECC enabled memory, then data integrity is maintained, but the number of cycles increases and throughput decreases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent pre-loads the entire data word into the memory controller's data buffer during the first partial write operation. This preliminary action allows subsequent partial writes to the same memory location to read from the buffer rather than performing full read-modify-write cycles, thereby improving throughput while maintaining data integrity through buffer-based operations

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If read-modify-write operation is used for partial writes, then correct ECC calculation is achieved, but additional cycles are required

Engineering Contradiction:
ImproveECC calculation accuracyVSAvoidcycle time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent introduces a data buffer as an intermediary component within the memory controller. This buffer stores the current data word and allows partial write operations to modify it without requiring a full read-modify-write cycle to memory. The buffer acts as a mediator that enables faster partial writes while the ECC calculation unit continues to operate on the buffer contents, maintaining ECC accuracy without the time penalty of repeated memory accesses

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If data buffer is added to store full data words, then subsequent partial writes are faster, but area overhead increases

Engineering Contradiction:
Improvepartial write speedVSAvoidmemory controller area
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

The data buffer in the patent is designed to serve multiple functions: it stores current data words for partial write operations, provides temporary storage for ECC calculation, and enables both read and write operations without requiring separate buffer structures. This multi-functionality allows the same buffer resource to improve various memory operations (partial writes, ECC updates) without proportionally increasing area overhead

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20130007574A1Partial-Writes to ECC (Error Check Code) Enabled Memories
Publication Date: 2013.01.03 TEXAS INSTRUMENTS INC
  • US20130007574A1 patent drawing
  • US20130007574A1 patent drawing
  • US20130007574A1 patent drawing

AI summary

A memory system includes a memory and a memory controller coupled to the memory. The memory controller includes a data buffer configured to store a full data word as a result of a partial write operation, wherein for a subsequent partial write operation, data is read from the data buffer.