ECC Encoder Circuit Using H-Matrix Min-Terms to Cut XOR Gates
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Solution Overview
Problem
Existing hardware for calculating Hamming code syndromes requires a large number of XOR logic gates, leading to increased chip space, power consumption, and calculation time due to repeated multiplications in the Hamming Matrix.
Innovation Solution
Breaking down the Hamming Matrix into min-terms reduces the number of calculations required, optimizing the number of XOR gates needed and eliminating redundant multiplications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional Hamming Matrix multiplication is used for syndrome calculation, then complete error detection capability is achieved, but the number of XOR logic gates increases significantly
Solution Approach 1:
The Hamming Matrix multiplication process is segmented into two distinct phases: pre-computation of column products (performed once during system initialization) and runtime syndrome calculation (performed for each data block). This segmentation allows the complex matrix multiplication to be broken down into manageable parts, with the computationally intensive portion done only once.
Solution Approach 2:
The column products of the Hamming Matrix are pre-computed and stored in lookup tables before actual syndrome calculations are needed. This preliminary action eliminates the need to perform repeated multiplications during runtime, as the results are directly retrieved from pre-computed tables based on the input data bits.
2Measurement precision
If traditional Hamming Matrix multiplication is used, then accurate syndrome bits are generated, but calculation time increases due to repeated multiplications
Solution Approach 1:
The column products are pre-computed and stored in lookup tables during system initialization. During runtime, the syndrome calculation simply retrieves pre-computed values based on input data bits and performs a single XOR operation, dramatically reducing calculation time while maintaining full accuracy.
Solution Approach 2:
Instead of performing repeated matrix multiplications, the patent creates copies of pre-computed column products and stores them in lookup tables. These tabular copies are then referenced during syndrome calculation, replacing complex repeated calculations with simple table lookups and single XOR operations.
3Reliability
If more XOR logic gates are used for Hamming Matrix multiplication, then complete ECC data generation is achieved, but power consumption increases
Solution Approach 1:
The ECC generation process is segmented into pre-computation phase (done once) and runtime phase (done for each data block). By separating these phases, the patent minimizes the number of active logic gates during runtime, reducing power consumption while maintaining complete ECC functionality.
Solution Approach 2:
Column products are pre-computed and stored in lookup tables during initialization. During runtime, the system only needs to perform simple table lookups and single XOR operations, dramatically reducing the number of active logic gates and corresponding power consumption compared to performing full matrix multiplications.
Data Source
AI summary
An integrated circuit (IC) device includes an error correction code (ECC) encoder circuitry configured to receive input data, determine min-terms in a Hamming matrix (H-Matrix) corresponding to the input data, and generate ECC data based on the min-terms and an output codeword based on the ECC data, and an error correction circuitry configured to generate a corrected output codeword based on the output codeword.