ECC Implementation in Non-ECC Memory Components
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Solution Overview
Problem
The implementation of error correcting codes (ECC) in memory subsystems is costly and impractical due to the need for additional storage space and interconnections, making it unsuitable for devices with limited physical space, such as laptops and some desktops.
Innovation Solution
A method and apparatus that translates logical addresses into physical addresses for both data and ECC, allowing them to be stored and accessed in the same memory page, thereby avoiding the need for separate row addresses and reducing access penalties, and enabling ECC checking and correction in non-ECC-compliant components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC memory components are used to implement error checking and correction, then data integrity is improved, but storage space requirements and interconnection complexity increase significantly
Solution Approach 1:
The patent merges data and ECC storage into the same memory page, allowing both to share the same physical memory location and interconnections. This eliminates the need for separate ECC memory components and their associated connectors and circuit traces, directly reducing interconnection complexity while maintaining data integrity through ECC checking.
Solution Approach 2:
The patent makes the memory subsystem universal by enabling ECC functionality in non-ECC-compliant components. The same memory page can store both data and ECC, and the system can operate with or without ECC based on configuration, providing multi-functionality that reduces complexity for systems that don't require full ECC compliance.
2Reliability
If separate memory devices are used for storing data and ECC, then data integrity is improved, but physical space requirements increase
Solution Approach 1:
The patent combines data and ECC storage within the same memory page, eliminating the need for separate memory devices. This merging approach directly reduces physical space requirements by utilizing the same memory array for both purposes, while still providing error checking and correction functionality.
Solution Approach 2:
The patent nests ECC bits within the same memory page as data bits, effectively placing one functional element inside another. This nesting allows ECC to be stored within the existing memory structure without requiring additional physical space, as the ECC bits occupy some of the same memory locations that would otherwise be used for data.
3Reliability
If additional storage space is allocated for ECC, then data integrity is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges data and ECC into the same memory page, eliminating the need for additional storage space and the associated manufacturing costs. By using the existing memory capacity for dual purposes, the system avoids the cost of additional memory components and their integration, directly improving ease of manufacture while maintaining data integrity.
4Adaptability or versatility
If ECC is implemented in non-ECC-compliant components, then adaptability is improved, but access efficiency may worsen due to separate row addressing requirements
Solution Approach 1:
The patent merges data and ECC access by storing them in the same memory page with the same row address. This allows both to be accessed simultaneously in a single memory operation, eliminating access penalties associated with separate row addressing and precharging, while maintaining the adaptability to use ECC in non-ECC-compliant components.
Data Source
AI summary
A method and apparatus for implementation of error correction code (ECC) checking in non-ECC-compliant components. The method includes receiving a logical address, wherein the logical address maps to first and second physical addresses of a memory. The first and second physical addresses of the memory correspond to memory locations that store data and a corresponding ECC, respectively. The method further comprises translating the logical address into the first and second physical addresses, accessing the data over a data path, separately accessing the ECC over the same data path, and checking the integrity of the data using the ECC.