ECC Parity Column Generation with Sequential Buffer Addressing
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Solution Overview
Problem
Conventional methods for generating error correction codes in optical disc drives require extensive time due to frequent switching of row addresses, leading to inefficient bandwidth usage and long data access times during the encoding process.
Innovation Solution
Implementing a system that uses a buffer to sequentially store data sections and employs address mode switching to alternate between column-by-column and row-by-row accessing strategies, allowing for efficient generation of error correction code parity columns by encoding partial-parity columns and updating them simultaneously with data section reading and writing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional DRAM addressing methods are used with frequent row address switching, then error correction codes can be generated, but data access time increases significantly and bandwidth efficiency decreases
Solution Approach 1:
The data block is divided into multiple sections, where each section contains a subset of data rows and columns. This segmentation allows the encoder to process smaller chunks of data sequentially, maintaining row address stability within each section while reducing overall encoding time through pipelined processing of multiple sections.
Solution Approach 2:
The system pre-organizes data into sections with contiguous row addresses before encoding begins. By preparing the data layout in advance with predictable addressing patterns, the system eliminates frequent row address switching during the actual encoding process, thereby reducing access time and improving bandwidth utilization.
2Ease of operation
If row address switching is performed frequently during encoding, then complete error correction codes can be generated, but the ratio of page-mode data access decreases and clock cycles increase
Solution Approach 1:
The system dynamically switches between processing different data sections in a pipelined manner, where each section is processed with optimized addressing patterns. This dynamic section-based processing allows the system to maintain high page-mode access ratios within each section while progressing through the entire data block efficiently.
Solution Approach 2:
The encoding process maintains continuous useful action by overlapping the processing of multiple data sections. While one section is being encoded, the system prepares the next section, ensuring that the encoder remains actively productive without idle periods caused by row address switching, thereby reducing total clock cycles required.
Data Source
AI summary
Methods and systems for generating ECC encode a data block to generate corresponding error correction codes. A first buffer sequentially stores a first section and a second section of the data block, wherein each of the first and second sections is composed of X data rows and Y data columns of the data block, and Y is greater than or equal to 2. A second buffer stores Y partial-parity columns. An encoder is used for encoding the first section read from the first buffer to generate the partial-parity columns, and then storing the partial-parity columns in the second buffer. The second section read from the first buffer and the partial-parity columns read from the second buffer are encoded to generate updated partial-parity columns. Next, the partial-parity columns in the second buffer are updated by storing the updated partial-parity columns.