ECC Phantom Bit Encoding for Extra Data Without SECDED Loss
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Solution Overview
Problem
Modern integrated circuits face challenges in increasing the number of data bits for transmission or storage while maintaining error correction and detection capabilities without modifying existing ECC logic, as adding data bits reduces the number of ECC bits available for error protection.
Innovation Solution
The implementation of phantom bits that are encoded into the ECC, allowing additional data bits to be transmitted or stored without affecting the existing ECC capabilities, by generating an ECC from a combination of primary and phantom bits, which can be decoded back into the additional bits upon reception.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If additional data bits are added to increase storage capacity, then the quantity of data that can be stored increases, but the number of ECC bits available for error protection decreases
Solution Approach 1:
Phantom bits are introduced as an intermediary mechanism. These phantom bits are not actually transmitted or stored but are generated during decoding by assuming all possible values and using the ECC syndrome to identify the correct combination. This intermediary approach allows additional data bits to be carried while maintaining full ECC protection capability without requiring additional ECC bits.
Solution Approach 2:
The system changes the parameter of data representation by encoding additional data bits into the existing ECC structure. Instead of adding separate data bits that would consume ECC resources, the invention modifies how data is represented within the existing bit width by utilizing the ECC bits themselves to carry additional information through carefully selected data patterns.
2Device complexity
If the number of data bits is increased without modifying existing ECC logic, then device complexity is reduced, but the ability to correct and detect errors is negatively impacted
Solution Approach 1:
The existing ECC logic is made multi-functional by enabling it to perform both its traditional error correction function and the additional function of carrying extra data bits. The same ECC generator and decoder circuits are used to encode/decode both the primary data and the additional data bits, eliminating the need for separate error correction logic while maintaining full SECDED capability.
3Productivity
If ECC bits are reduced to accommodate more data bits, then productivity increases, but manufacturing precision of error protection decreases
Solution Approach 1:
The invention adds another dimension to the data encoding space by utilizing the combinatorial possibilities of data bit patterns. Instead of simply adding more bits linearly, it exploits the dimensional space created by different combinations of data bits to embed additional information within the existing ECC structure, effectively increasing capacity without reducing protection precision.
Data Source
AI summary
Integrated circuits, systems and methods are disclosed in which data bits protected by error correction code (ECC) detection and correction may be increased such that a combination of primary and additional bits may also be ECC protected using existing ECC allocation, without affecting ECC capabilities. For example, the additional bits may be encoded into phantom bits that are in turn used in combination with the primary bits, to generate an ECC. This ECC may then be combined with the primary bits to form a code word. The code word may be transmitted (or stored) so that when the data bits are received (or retrieved), assumed values of the phantom bits may be decoded, using the ECC, back into the additional bits without the phantom bits or the additional bits ever having transmitted (or stored).