ECC Component Trace Data Storage Mode
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In cost-sensitive hardware architectures, the lack of dedicated trace buffers and high-speed connections for storing code flow tracing information during application code debugging leads to resource competition and execution interference, making it challenging to obtain tracing information without affecting the application code's execution.
Innovation Solution
An Error Correction Code (ECC) component is configured to operate in a trace data storage mode, utilizing ECC bits in memory to store trace data on-chip, eliminating the need for a dedicated trace buffer or high-speed connection to external memory, thereby minimizing resource usage and avoiding interference with the application code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If code flow tracing information is stored in system memory, then trace data can be obtained during application code execution, but system memory becomes unavailable to the application code and execution is affected
Solution Approach 1:
The patent segments the memory structure by dedicating specific memory locations (trace buffer) exclusively for trace data storage, separating trace data from system memory used by application code. This segmentation allows simultaneous access to both trace data and application code without interference.
Solution Approach 2:
The patent introduces a trace buffer as an intermediary component between the trace data generation source and the debugging system. This intermediary buffer captures and holds trace data, allowing application code to execute in system memory while trace information is simultaneously stored in the dedicated buffer for later analysis.
2Productivity
If a dedicated trace buffer is implemented, then trace data can be stored without affecting application code execution, but hardware cost and die area increase
Solution Approach 1:
The patent makes the trace buffer a universal resource that can be shared among multiple debugging functions and configurations. The buffer can operate in different modes (e.g., circular buffer, FIFO) and can be accessed by various debugging tools, reducing the need for multiple dedicated buffers for different purposes.
Solution Approach 2:
The patent implements a trace buffer with capacity sufficient for typical debugging needs but not excessively large. The buffer size is optimized to provide adequate trace data storage for most applications while minimizing die area consumption, using partial action by implementing just enough buffering capacity required for effective debugging.
3Loss of information
If a high-speed connection to external trace memory is used, then trace data can be offloaded in real-time, but hardware cost and complexity increase
Solution Approach 1:
The patent merges the trace buffer functionality with existing on-chip memory resources or uses standard memory interfaces already present in the hardware architecture. By combining trace buffering with available memory structures and using existing high-speed memory interfaces, the patent eliminates the need for separate high-speed connection hardware while still achieving real-time trace data capture.
Data Source
AI summary
A method and apparatus for storing trace data within a processing system. The method includes configuring at least one Error Correction Code, ECC, component within the processing system to operate in a trace data storage operating mode, generating trace data at a debug module of the processing system, and conveying the trace data from the debug module to the at least one ECC component for storing in an area of memory used for ECC information.