ECC-Guided Redundant Word-Line Repair in Semiconductor Memory
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Solution Overview
Problem
As manufacturing processes for volatile memory devices like DRAM become more refined, the number of defective memory cells increases, leading to reliability issues that existing repair methods struggle to address effectively.
Innovation Solution
A semiconductor device and method that utilize error correction codes (ECC) to correct errors in memory cell rows, deactivate word lines with excessive errors, and activate redundancy word lines to replace defective cells, reducing the need for physical disconnection or fusing operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If manufacturing process is refined to improve integration, then device integration is improved, but number of defective cells increases
Solution Approach 1:
The patent applies preliminary action by pre-identifying and marking redundant word lines during manufacturing before defects occur. The system maintains a mapping between normal word lines and redundant word lines, enabling proactive replacement when defects are detected during operation, thus resolving the contradiction between high integration and defect rate
2Reliability
If traditional repair methods are used to replace defective cells, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent uses copying by creating a virtual copy of the word line mapping system. Instead of physically repairing or replacing defective cells, the system copies the address mapping to redirect access to redundant word lines, simplifying the repair mechanism while maintaining reliability
Solution Approach 2:
The patent introduces an intermediary mapping mechanism that sits between the normal word line addresses and the physical memory cells. This intermediary layer handles the complexity of defect management by providing a translation layer that redirects defective addresses to valid redundant locations
3Reliability
If redundant word lines are activated to replace defective rows, then reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the word line activation state changeable. The system dynamically switches between normal word lines and redundant word lines based on defect detection, allowing the memory device to adapt its power consumption profile to the actual operational needs and defect state
Data Source
AI summary
A semiconductor device includes a host and a memory device including a first memory cell array corresponding to a plurality of word lines and a second memory cell array corresponding to a plurality of redundancy word lines. The host is configured to, based on an occurrence of a first type of error that is correctable through an error correction code (ECC) in a first memory cell row connected to a first word line in the first memory cell array, correct the first type of error through the error correction code. The host is configured to, based on a number of the occurrence of the first type of error in the first memory cell row exceeding a predetermined threshold value, deactivate the first word line and activate a first redundancy word line corresponding to the first word line among the plurality of redundancy word lines.