ECC XOR-Inverter Circuit Layout for Soft-Error Reliability
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Solution Overview
Problem
The increasing integration of semiconductor devices leads to a higher probability of soft errors due to radiation, which can alter data stored in memory, thereby decreasing the reliability of the stored data.
Innovation Solution
A semiconductor device is designed with an ECC circuit that utilizes a reduced number of MOS transistors to implement XOR circuits, thereby minimizing the occupied area and improving data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional XOR circuit is used in the ECC circuit, then data reliability is improved through error correction, but the occupied area increases due to the large number of MOS transistors required
Solution Approach 1:
The patent combines the XOR logic function with the inverter circuit into a single integrated structure. The XOR circuit shares transistors with the inverter, allowing the XOR operation to be performed without requiring a separate dedicated inverter circuit. This merging reduces the total transistor count from 12 to 8 transistors while maintaining both the XOR functionality and the required inversion operation.
Solution Approach 2:
The patent designs a multi-functional circuit where the same transistor components serve multiple purposes. The N-channel MOS transistors function both as part of the XOR logic operation and as the inverter circuitry. This universal design allows a single circuit structure to perform what would traditionally require separate dedicated circuits, thereby reducing the overall occupied area.
2Adaptability or versatility
If the degree of integration is increased to improve device functionality, then more features are incorporated, but the probability of soft errors due to radiation increases
Solution Approach 1:
The patent acknowledges that increased integration creates vulnerability to radiation-induced soft errors, but converts this challenge into an opportunity by implementing an ECC (Error Correction Code) circuit. The ECC circuit uses XOR operations to detect and correct errors caused by radiation, thereby transforming the harmful effect of integration into a managed risk through active error correction capabilities.
3Ease of operation
If 8 MOS transistors are used for the XOR circuit plus 4 additional transistors for inverter circuits, then the XOR logic function is correctly implemented, but the occupied area increases significantly
Solution Approach 1:
The patent merges the XOR logic function with the inverter circuit into a single integrated structure. The XOR circuit shares transistors with the inverter, allowing the XOR operation to be performed without requiring a separate dedicated inverter circuit. This merging reduces the total transistor count from 12 to 8 transistors while maintaining both the XOR functionality and the required inversion operation.
Data Source
AI summary
A semiconductor device includes a semiconductor chip in which a plurality of circuit blocks is formed. The plurality of circuit blocks includes a plurality of logic circuits. Each of the plurality of logic circuits includes an inverter circuit. The inverter circuit outputs a signal according to the result of a logical operation of a first signal and a second signal after being precharged by a trigger signal.