ECU Simulator Summation Reuse for Real-Time Matrix Computation
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Solution Overview
Problem
Current methods for matrix-vector multiplication in hardware-in-the-loop simulations, particularly with FPGAs, face challenges in meeting real-time computation requirements due to the need for breaking down large sums into subtotals of two summands, leading to inefficient computation efforts.
Innovation Solution
The method prioritizes matrix elements from the highest populated row with the highest total usability for summation, reusing pairs of summands across rows and columns, and optimizing the sequence of summations to minimize recomputations, using a residual matrix and auxiliary matrices to ensure efficient computation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If matrix-vector multiplication is broken down into a sequence of summations by two summands using elemental adders in FPGAs, then the computation can be implemented in hardware, but the computation speed decreases and real-time requirements cannot be met
Solution Approach 1:
The patent segments the matrix-vector multiplication into multiple parallel computation paths. Instead of sequentially adding two summands at a time, the method divides the summation into parallel segments that can be computed simultaneously using multiple additive units in the FPGA, thereby maintaining hardware implementability while significantly improving computation speed
Solution Approach 2:
The patent introduces a new dimension of parallelism by organizing the computation architecture to process multiple summands across different rows and columns simultaneously. This dimensional expansion allows the system to overcome the sequential limitation of elemental adders by distributing computations across multiple hardware units operating in parallel
2Ease of manufacture
If matrix-vector multiplication is broken down into sequential summations of two summands, then hardware implementation is feasible, but the computation effort increases and becomes inefficient
Solution Approach 1:
The patent applies preliminary action by pre-organizing the matrix elements and vector elements into optimized groups before the actual multiplication. The method pre-calculates and stores intermediate results that can be reused across multiple summations, reducing redundant computations and significantly improving overall computation efficiency while maintaining hardware feasibility
Solution Approach 2:
The patent merges multiple computation operations into unified hardware units. By combining multiple additive operations into single parallel hardware modules, the system reduces the total number of discrete operations required, thereby improving computation efficiency without sacrificing the ability to implement in FPGA hardware
3Ease of operation
If all matrix elements are processed in standard order, then the implementation is simple, but redundant computations occur and hardware resources are not optimized
Solution Approach 1:
The patent introduces dynamic adaptivity into the computation process by selectively processing matrix elements based on their contribution to the final result. The method dynamically adjusts the computation sequence to prioritize elements that maximize resource utilization and minimize redundant operations, thereby reducing energy waste while maintaining ease of implementation through systematic rules
Data Source
AI summary
A computer-implemented method for testing an ECU with a simulator is described and presented. The simulator numerically computes a mathematical environment model on a computational unit. The environment model simulates the environment of the ECU at least in part. The ECU and the simulator are coupled with each other via appropriate I/O interfaces and interact with each other. A matrix-vector multiplication is performed when the environment model is numerically computed on the simulator, in which a matrix is multiplied by a vector to form a result vector. The matrix-vector multiplication is broken down into a sequence of summations by two summands, wherein each summand is a product of two factors, one factor being an element of the matrix and the other factor being an element of the vector.