EDA Critical Area Analysis Learning Phase

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Solution Overview

Problem

Critical area analysis (CAA) in electronic design automation (EDA) for large integrated circuit designs is computationally intensive, requiring thousands of hours to analyze complex circuit designs, leading to significant delays and potential manufacturing defects.

Innovation Solution

A preliminary learning phase is implemented to collect and analyze a subset of CAA data, creating an accurate model that directs a more efficient full analysis, reducing processing time by over 95% with minimal accuracy degradation, using discrete analysis of continuous functions and targeted defect size selection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional CAA methods are used to analyze complex circuit designs, then manufacturing precision and defect detection are improved, but processing time increases significantly (thousands of hours)

Engineering Contradiction:
Improvedefect detection accuracyVSAvoidCAA processing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a learning phase before the full CAA analysis. During this learning phase, the system analyzes a subset of data to identify critical regions and defect patterns in advance. This preliminary analysis creates a model that guides the subsequent full analysis, allowing the system to focus computational resources on the most critical areas rather than uniformly analyzing the entire circuit design, thereby reducing overall processing time while maintaining defect detection accuracy.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If comprehensive CAA analysis is performed on the entire circuit design, then measurement precision is improved, but productivity decreases due to computational intensity

Engineering Contradiction:
Improvecritical area measurement accuracyVSAvoiddesign revision speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies segmentation by dividing the circuit design into distinct regions based on the learning phase analysis. The system identifies and segments critical regions where defects are most likely to occur and where they would have the greatest impact on circuit functionality. By segmenting the analysis this way, the system can perform comprehensive measurements on critical regions while using simplified or skipped analysis on non-critical regions, thereby maintaining measurement precision for important areas while improving overall productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by applying different levels of analysis quality to different regions of the circuit design. Critical regions identified during the learning phase receive high-quality, comprehensive CAA analysis with fine sampling intervals, while non-critical regions receive reduced or simplified analysis. This localized approach to quality ensures that measurement precision is maintained where it matters most for defect detection, while reducing computational burden in areas where high precision is less critical, thus improving design revision speed.

Inventive Principle:
Principle #3Local quality

3Reliability

If detailed analysis of all defect sizes is performed, then reliability of defect detection is improved, but processing time and computational resources increase

Engineering Contradiction:
Improvedefect detection reliabilityVSAvoidanalysis time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by performing detailed analysis only on a subset of defect sizes that are most relevant to the specific circuit design and manufacturing process. The learning phase identifies which defect size ranges are most critical for the given design, and the system then focuses detailed analysis on those specific defect sizes rather than analyzing all possible defect sizes uniformly. This partial approach maintains reliability for the most probable and impactful defect sizes while reducing processing time by avoiding exhaustive analysis of less relevant defect size ranges.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10796067B1EDA CAA with learning phase
Publication Date: 2020.10.06 CADENCE DESIGN SYST INC
  • US10796067B1 patent drawing
  • US10796067B1 patent drawing
  • US10796067B1 patent drawing

AI summary

Systems, methods, media, and other such embodiments described herein relate to critical area analysis (CAA) operations as part of electronic design automation (EDA). One embodiment involves accessing a circuit design having a first layer (which may be a composite layer), sampling the first layer, and performing an initial CAA using the sampled portions of the layer with a set of predetermined defect sizes. The initial CAA is used to automatically generate a model which can be used to accurately select input parameters (e.g., selected defect sizes) for a full analysis. A CAA characteristic is then calculated for the first layer using the input parameters. In various embodiments, different sampling percentages and criteria for selecting input parameters can be used to reduce the computing resources to compute a CAA characteristic, such as theta-bar, while limiting error to a threshold amount (e.g. less than one percent).