EDA Design View IP Protection via Name Encoding
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Solution Overview
Problem
The increasing complexity of system-on-a-chip (SoC) designs and the use of preexisting circuit blocks lead to challenges in protecting intellectual property (IP) from unauthorized use, copying, and misuse, as detailed design models are easily copied and manipulated, making it difficult to detect illegal use and requiring costly legal agreements.
Innovation Solution
A method and system that use a design protection system to redefined instance names and net names within EDA tool design views, encoding them with unique identifiers to create protected simulation models, allowing for secure sharing and simulation without revealing confidential information, using a script to generate protected SPEF and Verilog ILMs compatible with standard EDA tools.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If detailed simulation models are transferred to SOC integrators, then design usability and integration capability are improved, but IP security and risk of unauthorized use deteriorate
Solution Approach 1:
The patent segments the simulation model into protected and unprotected portions by applying encoding to specific design views (schematic, netlist, layout) while leaving other views unencoded. This allows integrators to access necessary functional information for design usability while preventing extraction of complete IP details, thus resolving the contradiction between usability and security.
Solution Approach 2:
The patent introduces an intermediary encoding mechanism that mediates between the IP owner and integrator. The encoding acts as a controlled interface that permits simulation and integration operations while blocking unauthorized copying and reverse engineering, thereby enabling usability without exposing full IP security risks.
2Object-affected harmful factors
If design models are encoded to protect IP, then IP security is improved, but design view usability and simulation capability deteriorate
Solution Approach 1:
The patent applies local quality by selectively encoding only certain design views (schematic, netlist, layout) that contain sensitive IP information, while leaving other views unencoded and fully functional. This localized approach maintains simulation usability for unencoded views while providing security for encoded views, resolving the contradiction between security and usability.
Solution Approach 2:
The patent implements partial action by applying encoding to only the extent necessary for IP protection rather than encoding all design views. This partial encoding approach maintains sufficient usability for simulation and integration while providing adequate security, avoiding the excessive action that would completely disable usability.
3Object-affected harmful factors
If legal agreements are used to protect cores, then IP protection is improved, but design development time and cost increase
Solution Approach 1:
The patent implements preliminary action by pre-applying encoding to design views before transfer to integrators. This proactive technical protection eliminates the need for time-consuming legal negotiations and agreements, as the encoding provides immediate, automatic protection that does not require separate legal processes, thus reducing design development time.
4Measurement precision
If complete design models are shared, then integration accuracy is improved, but detectability of illegal copying deteriorates
Solution Approach 1:
The patent extracts and removes sensitive identifying information from design views by applying encoding that obscures IP-specific details while preserving functional characteristics. This extraction of sensitive elements allows accurate integration testing without providing complete copies that could be illegally reused, thereby improving detectability of illegal copying while maintaining integration accuracy.
Data Source
AI summary
Sensitive circuit design information in HDL Interface Logic Models such as module names and structures within certain EDA tool design views is eliminated by substituting selected instance and net names with unrelated unique identifiers prior to transferring the design views as part of a simulation model of a circuit design, and consequently avoiding unauthorized use of that information. The method for encoding signal names in different design views of an IC design includes providing a list of names contained in a plurality of design databases, changing each name in the list of names to a protected name, and substituting each changed name with an associated protected name in each design view database.