EDA Tool Resolves G0-Space Violations in Double Patterning Layouts
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Solution Overview
Problem
In semiconductor fabrication, double patterning techniques face challenges in resolving G0-spaces that prevent layouts from being separated into two masks, leading to computationally intensive and time-consuming design changes, especially for large cells with complex IC layouts.
Innovation Solution
An electronic design automation (EDA) tool is used to identify and resolve G0-space violations by assigning near edge patterns to different masks, reducing cell edge spacings, and propagating changes to other layers, while ensuring compliance with G0 and G1 rules to minimize cell area and maintain layout integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If manual layout design changes are made to resolve G0-space violations, then design rule compliance is improved, but time consumption increases significantly
Solution Approach 1:
The system enables automatic resolution of G0-space violations through computational algorithms that self-correct layout assignments without requiring manual designer intervention. The EDA tool automatically identifies violations, generates resolution options, and applies fixes based on predefined criteria, allowing the design process to serve itself rather than relying on manual labor for each violation.
Solution Approach 2:
The patent replaces the manual mechanical process of layout editing with an automated computational system. Instead of designers manually moving patterns and resizing structures, the system uses algorithms to automatically reassign patterns to masks and adjust layouts, substituting human manual operations with automated computational mechanics.
2Manufacturing precision
If computational methods are used to resolve G0-space violations, then resolution accuracy is improved, but computational complexity increases
Solution Approach 1:
The computational problem is segmented into distinct processing stages: identifying G0-space violations, generating resolution options, evaluating alternatives, and applying fixes. This segmentation breaks down the complex computational task into manageable modules, improving accuracy through systematic processing while controlling overall computational complexity through structured approach.
Solution Approach 2:
The system changes key parameters such as mask assignments and pattern positions to resolve violations. By systematically varying these parameters and evaluating their impact, the system achieves high resolution accuracy. The computational complexity is managed by focusing parameter changes only where violations occur rather than globally.
3Area of moving object
If cell layout is optimized to reduce area, then integration density is improved, but design rule violations increase
Solution Approach 1:
The system performs preliminary detection of G0-space violations before finalizing the layout optimization. By identifying potential design rule violations in advance and resolving them during the optimization process, the system ensures that area reduction does not compromise compliance. This preliminary action prevents violations rather than correcting them after the fact.
Solution Approach 2:
The system implements feedback mechanisms where design rule compliance is continuously monitored during layout optimization. When violations are detected, the system adjusts the optimization parameters and re-evaluates the layout, creating a feedback loop that balances area reduction with compliance maintenance. This iterative feedback process ensures both objectives are achieved.
Data Source
AI summary
A method and system check a double patterning layout in abutting cells and switch the pattern in one of the cells if the edge patterns in each cell are in the same mask. The method includes receiving layout data having patterns in abutting cells, changing a designated mask in one cell if the edge patterns are in the same mask, adjusting cell edge spacings at a shared edge according to a minimum spacing rule and a G1-rule, and outputting a presentation of the layout data.