Hierarchical Design Partitioning for EDA Compilation
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Solution Overview
Problem
Manual partitioning of electronic design systems is time-consuming and can degrade circuit quality, as existing EDA tools rely on heuristic algorithms that produce varying results and require frequent recompilation, leading to inefficiencies in synthesis, placement, and routing processes.
Innovation Solution
An automated method for hierarchical design partitioning that considers connectivity, module size, optimization impact, and recompilation requirements, allowing incremental design procedures without complete system recompilation, and enabling user-adjustable partitioning strategies based on design objectives.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If manual partitioning is used to divide system design into partitions, then incremental design can be performed, but the partitioning process becomes time-consuming and may degrade circuit quality
Solution Approach 1:
The system performs automatic hierarchical design partitioning where the EDA tool itself divides the system design into partitions without requiring manual intervention. The partitioning algorithm automatically analyzes the design hierarchy, module connectivity, and resource usage to create optimal partitions, eliminating the time-consuming manual partitioning process while maintaining or improving circuit quality.
Solution Approach 2:
The patent changes the approach from manual parameter-based partitioning to automated algorithmic partitioning that dynamically adjusts partition boundaries based on design characteristics. The system evaluates multiple parameters including module connectivity, resource usage, and timing constraints to automatically determine optimal partition locations, transforming the partitioning process from a static manual task to a dynamic automated optimization process.
2Extent of automation
If heuristic algorithms are used for partitioning in EDA tools, then design can be automated, but results vary significantly due to the seed effect requiring multiple compilations
Solution Approach 1:
The patent applies hierarchical segmentation by dividing the design into multiple levels of partitions - top-level partitions based on major functional blocks, and subordinate partitions within each top-level partition. This multi-level segmentation approach reduces the seed effect by creating coarser partition boundaries that are more stable across different compilations, while still allowing fine-grained optimization within each partition level.
Solution Approach 2:
The system performs preliminary hierarchical partitioning before detailed optimization, establishing a stable top-level partition structure that mitigates the seed effect. By pre-establishing partition boundaries based on design hierarchy and connectivity rather than random heuristic seeds, the system creates a reliable foundation that reduces variation in compilation results while maintaining automation.
3Manufacturing precision
If frequent recompilation is performed during design iteration, then design quality can be optimized, but compilation time increases significantly
Solution Approach 1:
The hierarchical partitioning divides the design into independent partitions that can be compiled separately. When design changes occur, only the affected partitions need to be recompiled rather than the entire system. This segmentation enables selective incremental compilation, maintaining design optimization quality while dramatically reducing compilation time for iterative design changes.
Solution Approach 2:
The system performs partial recompilation by identifying and recompiling only the specific partitions that contain modified modules, rather than recompiling the entire design. This partial action approach maintains optimization quality for changed portions while avoiding unnecessary recompilation of unchanged partitions, significantly improving productivity during design iteration.
4Adaptability or versatility
If manual partitioning is performed by designers, then partitioning can be customized, but the process becomes time-consuming for designs with hundreds or thousands of modules
Solution Approach 1:
The EDA tool automatically performs hierarchical partitioning by analyzing the design hierarchy, module connectivity, and resource usage patterns. The system generates partition recommendations and can automatically create partitions without designer intervention, eliminating the time-consuming manual process while maintaining adaptability through configurable partitioning criteria and the ability for designers to review and adjust automated results.
Data Source
AI summary
A method for designing a system on a target device is disclosed. The system is synthesized. The system is partitioned into a plurality of logical sections utilizing information derived from synthesizing the system and prior to performing placement of the system on the target device. Other embodiments are described and claimed.