Concurrent Layout Data Processing for EDA I/O Bottlenecks
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Solution Overview
Problem
The increasing size and complexity of mask data in electronic design automation (EDA) workflows lead to significant bottlenecks in turnaround time (TAT) due to I/O and resource contention, making it difficult to meet stringent TAT requirements imposed by foundries.
Innovation Solution
Implementing a concurrent computation paradigm that keeps layout data distributed during handoffs among processing stages, allowing incremental and concurrent propagation of data between stages, and executing data processing and I/O operations simultaneously, using a template database with spatially coherent processing schedules to optimize performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If layout data is transferred to or from hard disk drive using conventional technology, then data storage is achieved, but I/O time increases significantly (about 3 hours for one terabyte)
Solution Approach 1:
The patent divides the layout data into multiple fragments and distributes them across different storage locations. Instead of transferring one large file sequentially, the system processes multiple smaller fragments in parallel, significantly reducing I/O bottlenecks and transfer time while maintaining the ability to handle terabyte-scale data volumes.
Solution Approach 2:
The patent implements a concurrent computation paradigm where data processing among consecutive stages and I/O operations are executed simultaneously rather than sequentially. This allows the system to maintain continuous productive work by overlapping computation with I/O operations, eliminating idle waiting time and reducing overall turnaround time.
2Productivity
If multiple handoffs among processing stages are performed, then complete processing is achieved, but I/O time alone can exceed the TAT requirement
Solution Approach 1:
The patent enables concurrent execution of data processing stages and I/O operations, allowing multiple handoffs to occur in parallel rather than sequentially. This maintains complete processing functionality while reducing total I/O time by overlapping operations that previously had to be performed one after another.
Solution Approach 2:
The patent transitions from sequential single-threaded processing to multi-dimensional parallel processing across multiple stages and fragments simultaneously. This dimensional change allows the system to perform multiple handoffs concurrently, transforming the time complexity from linear to logarithmic or constant in certain scenarios.
3Reliability
If layout data is represented in a single large file, then data integrity is maintained, but I/O bottleneck occurs during transfer
Solution Approach 1:
The patent divides the layout data into multiple fragments while maintaining a manifest or index that tracks all fragments and their relationships. This segmentation enables parallel I/O operations on smaller files, dramatically improving transfer speed while the manifest ensures data integrity by tracking the completeness and consistency of all fragments.
Solution Approach 2:
The patent creates distributed copies of layout data fragments across multiple storage locations rather than relying on a single centralized file. This copying approach maintains data integrity through redundancy and consistency mechanisms while enabling simultaneous access and transfer of multiple fragments, thereby improving overall transfer throughput.
Data Source
AI summary
Some embodiments of the present invention overcome I/O bottlenecks of an EDA work flow by keeping layout data distributed during handoffs among different processing stages. Specifically, some embodiments leverage a concurrent computation paradigm where data is propagated incrementally between stages, and where data processing among consecutive stages and the I/O between stages are executed concurrently. Specifically, different data processing stages can partition the layout data differently, and portions of the layout data that are not required by a data processing stage can be either passed-through or passed-around the data processing stage.