EDA Router Hotspot Detection via Fast Lithography Models
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Solution Overview
Problem
Current methods for integrated circuit design, such as lithography simulation and RET optimization, are resource-intensive and inefficient due to their reliance on complex rules and manual processes, which are exacerbated by increasing design complexity and smaller feature sizes, leading to significant time and computing resource requirements.
Innovation Solution
Implementing fast models and pattern matching within EDA tools to directly address manufacturing-related issues, such as lithography processing effects, by creating a library of bad patterns to identify and prevent hotspot problems, thereby reducing the need for external verification tools and manual rule modifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If lithography simulation and RET optimization are used to verify integrated circuit layouts, then manufacturing precision is improved, but resource consumption and processing time increase significantly
Solution Approach 1:
The patent applies preliminary action by performing lithography simulation and RET optimization during the routing process itself, rather than as separate post-verification steps. The router uses fast lithography models to predict manufacturing issues before finalizing the layout, allowing corrections to be made during routing rather than requiring iterative re-simulation later in the design cycle
Solution Approach 2:
The patent introduces fast lithography models as an intermediary between the router and full lithography simulation tools. These fast models provide approximate but sufficiently accurate predictions of manufacturing issues, enabling the router to make informed decisions without requiring computationally expensive full simulations at every step
2Manufacturing precision
If complex rules and manual processes are used for hotspot detection, then manufacturing precision is improved, but device complexity and ease of operation worsen
Solution Approach 1:
The patent applies self-service by enabling the router to automatically detect and correct its own manufacturing issues using integrated fast lithography models. The router identifies potential hotspots and adjusts routing decisions autonomously without requiring external verification tools or manual rule modifications, making the process self-correcting and reducing overall system complexity
3Manufacturing precision
If external verification tools are used for hotspot detection, then manufacturing precision is improved, but resource consumption increases
Solution Approach 1:
The patent merges the hotspot detection functionality directly into the router by integrating fast lithography models within the routing tool. This combination eliminates the need for separate external verification tools and their associated computing resources, while still providing accurate hotspot detection through the unified system
Data Source
AI summary
A approach is described for allowing electronic design, verification, and optimization tools to implement very efficient approaches to allow the tools to directly address the effects of manufacturing processes, e.g., to identify and prevent problems caused by lithography processing. Fast models and pattern checking are employed to integrate lithography and manufacturing aware processes within EDA tools such as routers.