EDA Technology Mapping Retains Sub-Circuit Alternatives
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Solution Overview
Problem
Conventional Electronic Design Automation (EDA) tools discard intermediate data during the implementation flow of circuit designs in integrated circuits, leading to unsatisfactory results, requiring designers to restart the process from the beginning if placement or routing is not satisfactory.
Innovation Solution
The method involves generating and retaining multiple implementations of sub-circuits during technology mapping, allowing for selective replacement of primary implementations with alternate ones based on evaluation metrics such as timing, area, or power usage during the placement stage, enabling informed decisions with more complete information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional EDA tools discard intermediate data during implementation flow, then the process is simpler and faster, but the quality of placement and routing deteriorates, requiring redesign from scratch
Solution Approach 1:
The technology mapping stage performs preliminary action by generating multiple alternative implementations of sub-circuits and retaining their intermediate data. This allows the placement stage to access and evaluate these pre-computed alternatives, making informed decisions about which implementation to select without needing to restart from synthesis. The preliminary generation of multiple options enables quality improvement while maintaining efficiency.
Solution Approach 2:
Instead of discarding intermediate data from technology mapping, the invention recovers and retains this data by storing multiple alternative implementations. The placement stage then recovers this information to evaluate different sub-circuit implementations against placement criteria, transforming what would be wasted intermediate results into valuable decision-making assets that improve final placement quality.
2Device complexity
If only single technology mapping result is generated, then the process is simpler, but the ability to optimize placement and routing deteriorates
Solution Approach 1:
The invention applies segmentation by dividing the circuit design into sub-circuits and generating multiple alternative implementations for each sub-circuit independently. This segmented approach allows the placement stage to evaluate and select from multiple options for each sub-circuit, improving placement optimization capability while keeping the overall process manageable through modular generation of alternatives.
Solution Approach 2:
The technology mapping process becomes dynamic by generating multiple alternative implementations rather than a single fixed result. This dynamic approach allows the placement stage to adaptively select the most suitable implementation based on placement criteria, enhancing placement optimization capability while the alternatives are generated systematically to manage complexity.
3Ease of operation
If implementation flow is sequential with single-pass results, then the workflow is simpler, but the quality of final implementation deteriorates
Solution Approach 1:
The invention introduces feedback by allowing the placement stage to evaluate multiple alternative implementations generated by technology mapping and use this feedback to select optimal implementations. The placement criteria provide feedback information that guides the selection process, enabling quality improvement while maintaining a relatively simple sequential workflow where each stage uses information from the previous stage effectively.
Data Source
AI summary
A computer-implemented method of implementing a circuit design within a target integrated circuit (IC) can include, during technology mapping of the circuit design, determining a plurality of implementations of at least one sub-circuit of the circuit design and placing the circuit design on the target IC using a primary implementation of the plurality of implementations of the sub-circuit. The primary implementation of the sub-circuit can be selectively replaced with an alternate implementation of the sub-circuit selected from the plurality of implementations of the sub-circuit. The placed circuit design, including either the primary implementation or the alternate implementation of the sub-circuit, can be output.