EDA Physical Verification Clustering for Runtime Reduction

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Solution Overview

Problem

Current electronic design automation (EDA) tools do not efficiently scale physical verification runtime, particularly for antenna verification, leading to lengthy processing times due to redundant operations and limited gains from using multiple computers or processors.

Innovation Solution

The implementation of a verification runtime reduction method that clusters rules and operations for parallel processing, allowing for the elimination of redundant tasks and optimizing the assignment of clusters to processors, thereby speeding up the physical verification process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional EDA tools perform physical verification sequentially, then verification completeness is maintained, but computational runtime becomes excessively long

Engineering Contradiction:
Improveverification speedVSAvoidcomputational runtime
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the physical verification process by dividing design rules into distinct categories (e.g., antenna rules, DRC rules, LVS rules) and further subdividing them into operational clusters. This segmentation enables independent parallel execution of different verification operations, reducing total runtime while maintaining complete verification coverage through systematic rule coverage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a clustering dimension to the verification process, organizing rules based on operational similarity and overlap characteristics. By adding this organizational dimension, the system can efficiently assign clusters to multiple processors, transforming a sequential one-dimensional process into a parallel multi-dimensional execution model that significantly reduces runtime.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple computers or processors are used for verification, then parallel processing capability increases, but redundant operations occur and scaling efficiency is limited

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidprocessor assignment complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges similar verification operations into clusters based on operational overlap and rule similarity. By combining redundant operations into unified clusters, the system eliminates duplicate work when assigning to multiple processors, improving parallel processing efficiency and reducing the complexity of processor assignment through a systematic clustering approach.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If antenna verification is performed with high precision, then verification accuracy improves, but processing time increases significantly

Engineering Contradiction:
Improveantenna verification accuracyVSAvoidantenna check runtime
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary clustering and categorization of antenna verification rules before execution, organizing operations by overlap characteristics and computational intensity. This preliminary organization enables the system to strategically assign different antenna check operations to appropriate processors, maintaining high verification accuracy while reducing overall runtime through optimized parallel execution.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240346225A1System for physical verification runtime reduction and method of using same
Publication Date: 2024.10.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240346225A1 patent drawing
  • US20240346225A1 patent drawing
  • US20240346225A1 patent drawing

AI summary

A method of performing a design rule check includes clustering at least one of a plurality of rules with overlapping operations from a plurality of operations or the plurality of operations with overlapping rules from the plurality of rules. The method further includes at least one of transforming at least one of the clustered plurality of operations into a first operation group or a second operation group, or transforming at least one of the clustered plurality of rules into a first rule group or a second rule group. The method even further includes at least one of assigning at least one of the first operation group to a first processor or the second operation group to a second processor, or assigning at least one of the first rule group to the first processor or the second rule group to the second processor.