CMP Eddy Current Endpoint Detection for Copper Planarization

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Solution Overview

Problem

The challenge in semiconductor device fabrication is achieving consistent planarization of copper layers without dishing, especially when using Chemical Mechanical Polishing (CMP), due to variations in pattern density and trench depth, which can lead to incomplete removal or excessive removal of the copper layer, affecting device reliability and productivity.

Innovation Solution

A method that calculates a target eddy current value based on pattern density and trench depth to accurately measure the end point during CMP, ensuring consistent planarization of the copper layer, using an eddy current monitoring system to stop the process when the target value is reached, thereby controlling the final height of the conductive layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If CMP is performed in multiple steps to decrease dishing, then dishing is reduced, but end point detection becomes difficult and productivity decreases

Engineering Contradiction:

Improveplanarization qualityVSAvoidfabrication efficiency

Core Design Contradiction:

ShapeVSProductivity

Solution Approach 1:

The patent implements real-time eddy current monitoring during CMP to provide feedback on the planarization process. The system continuously measures eddy current values and compares them against a predetermined target value, automatically controlling when to stop CMP. This feedback mechanism enables precise end point detection without requiring multiple manual inspection steps, thereby maintaining high planarization quality while improving productivity.

Inventive Principle:

Principle #23Feedback

2Measurement precision

If conventional eddy current monitoring is used, then end point can be detected, but the end point varies with pattern density and trench thickness leading to Cu residue or excessive insulating layer removal

Engineering Contradiction:

Improveend point detection accuracyVSAvoidcopper layer thickness control

Core Design Contradiction:

Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent addresses the variability issue by dynamically adjusting the target eddy current value based on pattern density and trench depth parameters. The system calculates a corrected target value using the formula: corrected target value = initial target value + (pattern density coefficient × pattern density) + (trench depth coefficient × trench depth). This parameter adjustment ensures accurate end point detection and consistent copper layer removal across different pattern densities and trench configurations.

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If target thickness is varied to compensate for detection variations, then some accuracy is maintained, but productivity degrades due to frequent target adjustments

Engineering Contradiction:

Improvecopper layer thickness controlVSAvoidprocess efficiency

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent implements preliminary calculation of the corrected target eddy current value based on pre-measured pattern density and trench depth parameters before starting the CMP process. This advance preparation eliminates the need for frequent target adjustments during production, as the system is pre-configured with the appropriate target value for each specific pattern configuration, thereby maintaining manufacturing precision while maximizing productivity.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for reliable and efficient planarization of conductive layers regardless of pattern density and trench depth, reducing copper residue and improving semiconductor device productivity by ensuring consistent target thickness and preventing over-removal of the insulating layer.

Implementation Method 1

measuring eddy current values on the conductive layer using an eddy current monitoring system

Methodology Applied

Scientific EffectEddy current: Eddy Currents

Implementation Method 2

the copper layer may be planarized by Chemical Mechanical Polishing (CMP)

Methodology Applied

Scientific EffectChemical Mechanical Polishing:

Data Source

PatentUS7737038B2Method of fabricating semiconductor device including planarizing conductive layer using parameters of pattern density and depth of trenches

Publication Date: 2010.06.15 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of fabricating a semiconductor device includes forming a conductive layer on an insulating layer having a plurality of trenches on a semiconductor substrate, such that the conductive layer fills in the plurality of trenches formed in the insulating layer, and calculating a target eddy current value to measure an end point using parameters of a pattern density and a depth of the trenches. The method further includes planarizing the conductive layer and measuring eddy current values on the conductive layer using an eddy current monitoring system, and stopping the planarization when the measured eddy current value reaches the target eddy current value to form a planarized conductive layer having a target height on the insulating layer.