Edge-Detected Clock Recovery for Asynchronous Data Decoding
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Solution Overview
Problem
Current RFID systems face challenges in decoding data from smart cards due to the need for a synchronous clock signal, which is often difficult to generate accurately, especially with variations in phase or frequency.
Innovation Solution
A method and device that generate a synchronous clock signal by detecting edges in the encoded data signal, producing a binary clock signal that changes logic state every two pulses of the edge detection signal, using circuits that charge and discharge capacitors to detect rising and falling edges and compare signals to a threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a synchronous clock signal is generated using traditional methods, then the decoding can be performed, but the clock signal is difficult to generate accurately with variations in phase or frequency
Solution Approach 1:
The system generates the clock signal autonomously from the incoming data signal itself using edge detection, eliminating the need for external clock synchronization mechanisms. The encoder detects edges in the received signal and generates corresponding clock pulses, making the system self-sufficient and immune to external phase or frequency variations.
Solution Approach 2:
The system uses feedback from the received signal's edge transitions to continuously adjust and maintain clock signal synchronization. By detecting edges in real-time and generating clock pulses based on these detections, the system creates a closed-loop feedback mechanism that ensures accurate synchronization despite variations in the incoming signal.
2Reliability
If edge detection circuits with capacitors and comparators are used, then a reliable synchronous clock signal is generated, but the device complexity increases
Solution Approach 1:
The decoding system is divided into distinct functional modules: an edge detection circuit that generates pulses from signal transitions, a sampling circuit that captures data at appropriate moments, and a clock generation circuit that produces synchronous clock signals. This segmentation allows each module to perform its specific function with simple, dedicated circuitry, reducing overall complexity while maintaining reliability.
Solution Approach 2:
The edge detection circuit acts as an intermediary between the incoming data signal and the decoding logic. It converts the analog signal transitions into discrete digital pulses that can be easily processed by subsequent digital circuits, simplifying the interface between analog signal reception and digital data processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures a clock signal that is always in phase with the encoded data signal, even with slight phase or frequency variations, improving decoding accuracy and reliability without the need for phase-locked loops.
Implementation Method 1
using circuits that charge and discharge capacitors to detect rising and falling edges
Implementation Method 2
compare signals to a threshold voltage
Data Source
AI summary
A method is provided for decoding an encoded binary data signal and generating a clock signal that is synchronous with the encoded data signal. There is generated, from the encoded data signal, an edge detection signal comprising four pulses per binary state of the encoded data signal. The encoded data signal is sampled every four pulses of the edge detection signal so as to obtain a binary signal of decoded data, and from the edge detection signal there is generated a binary clock signal that is synchronous with the encoded data signal and changes logic state every two pulses of the edge detection signal.