Edge-Controlled Delay Circuit for Low-Power Signal Timing
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Solution Overview
Problem
Existing delay circuits face high power consumption during state restoration, which affects processing speed and is not suitable for low-power applications like memory systems, and traditional methods either cause signal deformation or increase power consumption through feedback circuits.
Innovation Solution
A delay circuit design that includes a delay control module with a capacitor unit that connects and disconnects within specific edge delay durations to control signal delay, reducing power loss by preventing continuous charging and discharging, and omitting the need for a feedback circuit to minimize overall power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If a capacitor is continuously connected between input and output terminals to extend signal delay time, then the delay duration is increased, but the capacitor undergoes continuous charging and discharging cycles causing high power consumption
Solution Approach 1:
The patent applies periodic action by controlling the capacitor to connect and disconnect at specific periods rather than continuous connection. The control signal enables the capacitor to be connected only during required delay periods and disconnected during others, creating a periodic operation pattern that reduces unnecessary charging-discharging cycles and thereby lowers power consumption while maintaining required delay duration
Solution Approach 2:
The patent implements dynamics by making the capacitor connection state controllable and changeable based on operational requirements. Through a control signal that can switch the capacitor between connected and disconnected states, the system dynamically adjusts the capacitor's participation in the circuit, allowing delay function activation only when needed and reducing energy loss during non-operational periods
2Speed
If feedback circuits and inverters are added to improve state restoration speed, then the restoration speed is increased, but the circuit complexity and power consumption increase
Solution Approach 1:
The patent applies the taking out principle by removing the feedback circuit from the traditional delay circuit configuration. Instead of using a feedback loop with inverter to restore state, the invention directly controls the capacitor connection through a simple control signal, extracting the unnecessary feedback components and achieving state restoration without the associated complexity and power consumption
Solution Approach 2:
The patent introduces a control signal as an intermediary element that mediates between the input signal and the capacitor connection. This control signal acts as a mediator to manage the capacitor's connection and disconnection timing, replacing the need for complex feedback circuits and inverters while achieving effective state control and restoration
3Reliability
If feedback circuits are used to restore circuit state, then state restoration is achieved, but signal deformation occurs and power consumption increases
Solution Approach 1:
The patent removes the feedback circuit that causes signal deformation while retaining the essential state restoration function. By directly controlling the capacitor connection through a control signal instead of using feedback loops, the invention extracts the harmful feedback mechanism and achieves clean state restoration without signal deformation
Solution Approach 2:
The control signal serves as an intermediary that enables state restoration without the signal deformation caused by feedback circuits. This mediator provides direct control over the capacitor's connection state, avoiding the multiple inverter stages and feedback loops that distort signals in traditional designs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption while improving state restoration speed by controlling the capacitor's connection and disconnection within edge delay durations, allowing the delay circuit to operate efficiently with low power consumption.
Implementation Method 1
a capacitor is generally arranged between an input terminal and an output terminal of the delay circuit, to extend a time for a rising edge signal or a falling edge signal to reach the output terminal
Data Source
AI summary
A delay circuit includes the following: an input module, configured to receive a target input signal and output the target input signal to a first node, the target input signal being a rising edge signal or a falling edge signal of a pulse signal; an output module, configured to output a target output signal, the target output signal being a delayed signal of the target input signal; and a delay control module, connected to the input module through the first node, and connected to the output module through a second node. The delay control module includes at least one delay capacitor unit, and the delay control module is configured to control a connection between the at least one delay capacitor unit and the first node according to a rising edge delay duration or a falling edge delay duration.