Shift Register Control Circuit for Edge-Triggered Power Reduction
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Solution Overview
Problem
Digital shift registers consume unnecessary power as the input clock toggles even when input values do not change, leading to inefficient power usage.
Innovation Solution
A shift register circuit with a control circuit that activates the flip-flop chain only when specific count conditions of edge transitions in the input and output signals are met, using counters and a comparator to generate a control signal based on the difference in start and end shift events, thereby reducing unnecessary power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the input clock continuously toggles to maintain flip-flop operation, then the shift register can respond to input changes, but unnecessary power is consumed when input values do not change
Solution Approach 1:
The patent implements periodic action by using an enable signal that is asserted only during periods when input changes occur. The flip-flops are clocked periodically rather than continuously, with the enable signal gating the clock to flip-flops only when necessary. This allows the shift register to maintain response capability while eliminating continuous power consumption during static periods.
Solution Approach 2:
The patent applies dynamics by making the clock signal to flip-flops dynamic rather than static. The enable signal dynamically controls whether the clock is passed to the flip-flops based on detected input changes. When inputs are stable, the enable signal blocks the clock, preventing unnecessary toggling and power consumption while maintaining the ability to respond when changes occur.
2Use of energy by moving object
If a control circuit with counters and comparators is added to reduce power consumption, then energy efficiency improves, but device complexity increases
Solution Approach 1:
The patent extracts the power management function from the main data path by implementing a separate control circuit that monitors input changes and generates enable signals. This control circuit includes counters and comparators that operate independently from the flip-flop chain, allowing power reduction without directly complicating the core shift register functionality. The control logic is taken out as a distinct module that gates the clock signal.
3Use of energy by moving object
If the flip-flop chain is activated only when necessary based on edge transitions, then power consumption is reduced, but the control logic complexity increases
Solution Approach 1:
The patent applies preliminary action by detecting edge transitions on the input signal before they propagate through the flip-flop chain. The control circuit monitors for rising or falling edges on the enable input and asserts the enable signal in advance, preparing the flip-flops to capture the upcoming data transition. This preliminary detection allows the system to activate only when necessary, reducing power while managing control logic complexity through anticipatory control.
Data Source
AI summary
A shift register circuit including a flip-flop chain and a control circuit is provided. The flip-flop chain is configured to receive an input signal and output an output signal. The control circuit is coupled to the flip-flop chain. The control circuit is configured to receive the input signal and the output signal and output a control signal to activate the flip-flop chain according to edge transitions of the input signal and the output signal. In addition, a method for controlling a shift register circuit is also provided.