Edge Coupling Semiconductor Dies Interposer Detents
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Solution Overview
Problem
Existing semiconductor packaging technologies face challenges in efficiently connecting multiple dies within a package, particularly in reducing interconnection length and package volume, while providing effective electrical interconnections between stacked dies.
Innovation Solution
The method involves edge coupling of semiconductor dies using an interposer with edge detents, which allows for electrical coupling between dies through solder spheres, and the use of redistribution layers to align and connect pads, enabling face-to-face configurations and reducing interconnection length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple semiconductor dies are stacked within a package, then packaging costs are reduced and space utilization is improved, but providing electrical interconnections between dies becomes more difficult
Solution Approach 1:
A silicon interposer is introduced as an intermediary component between stacked semiconductor dies. The interposer contains through-silicon vias (TSVs) that provide vertical electrical interconnections, eliminating the need for complex wire bonds or through-die vias. This mediator enables simple face-to-face die stacking while providing robust electrical connectivity through the interposer's conductive via structure.
Solution Approach 2:
The patent transitions from planar interconnection methods to three-dimensional vertical interconnection through stacked dies. Electrical connections are established in the vertical dimension through TSVs in the interposer, allowing multiple dies to be interconnected in the Z-direction rather than requiring complex lateral routing on a single plane.
2Reliability
If traditional interconnection methods are used for stacked dies, then electrical connections can be established, but interconnection length increases and package volume per die increases
Solution Approach 1:
The silicon interposer acts as a mediator that positions connection points directly beneath corresponding pads on each die. TSVs provide short, direct vertical pathways through the interposer, minimizing interconnection length compared to lateral wire bonds or through-die vias that would require longer paths through the die substrates themselves.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces interconnection length and package volume, enabling efficient stacking and connection of multiple semiconductor dies while maintaining thermal expansion compatibility and minimizing electrical interference.
Implementation Method 1
Interposer 103 may be made of silicon, glass, or ceramic, and may include solder spheres 105 or other electrical coupling elements
Data Source
AI summary
Edge coupling of semiconductor dies. In some embodiments, a semiconductor device may include a first semiconductor die, a second semiconductor die disposed in a face-to-face configuration with respect to the first semiconductor die, and an interposer arranged between the first semiconductor and second semiconductor dies, the interposer having an edge detent configured to allow an electrical coupling between the first and second semiconductor dies. In other embodiments, a method may include coupling a first semiconductor die to a surface of an interposer where an edge of the interposer includes detents and the first semiconductor die includes a first pad aligned with a first detent, coupling a second semiconductor die to an opposite surface of the interposer where the first and second semiconductor dies are in a face-to-face configuration and the second semiconductor die includes a second pad aligned with a second detent, and coupling the first and second pads together.