Edge Detector Level Shifting for Constant Voltage Swing
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Solution Overview
Problem
Existing level shifters fail to maintain a consistent voltage swing for both input and output signals, which can damage core devices with thin gate dielectric layers and lead to increased size and power consumption, while also experiencing signal attenuation at lower frequencies.
Innovation Solution
A level shifting apparatus that includes an inverter, capacitors, and an edge detector to selectively deactivate a transmission gate, maintaining a constant voltage swing and preventing direct current connection between inverters, thereby reducing voltage swing and size, and using additional capacitors to control voltage levels independently of signal frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If level shifters are formed using I/O devices with thicker gate dielectric layers to withstand higher voltages, then voltage level shifting capability is improved, but device size and power consumption increase
Solution Approach 1:
The patent applies local quality by using I/O devices with thicker gate dielectric layers specifically for level shifting operations that require high voltage tolerance, while core devices with thinner gate dielectric layers are used for normal operations where high voltage tolerance is not required. This localized application of different device characteristics optimizes both voltage withstand capability and device size.
2Speed
If level shifters increase the voltage level of logically high voltage but maintain the same logically low voltage level, then voltage swing of output signal is increased, but core devices with thin gate dielectric layers are at risk of damage
Solution Approach 1:
The patent applies preliminary anti-action by introducing a bias circuit that proactively adjusts the logically low voltage level before it can cause damage to core devices. The bias circuit generates a shifted low voltage level that prevents excessive voltage swing from damaging the thin gate dielectric layers of core devices, while still maintaining sufficient voltage swing for proper signal operation.
Solution Approach 2:
The bias circuit acts as an intermediary between the level shifter and core devices, mediating the voltage levels to protect core devices from damage while enabling proper signal transmission. The bias circuit translates and adjusts voltage levels to ensure compatibility between I/O devices and core devices.
3Reliability
If level shifters include a bias circuit to increase the logically low voltage level, then voltage swing is controlled and device protection is improved, but device complexity increases
Solution Approach 1:
The patent merges the bias circuit functionality with the level shifter structure, integrating voltage level adjustment capabilities directly into the level shifting operation. This combination reduces overall circuit complexity compared to having separate bias generation and level shifting circuits.
4Adaptability or versatility
If conventional level shifters are used, then level shifting function is provided, but signal attenuation occurs at lower frequencies
Solution Approach 1:
The patent applies dynamics by using capacitive coupling and dynamic biasing schemes that adapt to different signal frequencies. The capacitive coupling mechanism provides frequency-independent signal transmission by blocking DC components while allowing AC signal components to pass through effectively, eliminating the signal attenuation problem at lower frequencies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for level shifting with devices having thin gate dielectric layers, reducing device size and power consumption, while maintaining a consistent voltage swing and operating at high frequencies without signal attenuation, thus enhancing switching speed and reliability.
Implementation Method 1
a capacitor including a first terminal coupled to a gate of the first transistor and a second terminal configured to receive an input signal
Data Source
AI summary
An edge detector includes an output node selectively coupled to a first voltage node through a first transistor, the first voltage node having a first voltage level, and a second transistor configured to continuously couple the output node to a second voltage node having a second voltage level. A capacitor includes a first terminal coupled to a gate of the first transistor and a second terminal configured to receive an input signal.