Edge Management Unit for 2D Vector Graphics Memory Optimization

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Solution Overview

Problem

Current graphic processing technologies face inefficiencies in managing and converting 2D vector graphics to raster images, particularly in terms of memory access and data storage, leading to suboptimal performance and increased memory bandwidth usage.

Innovation Solution

The proposed solution involves an edge management unit that utilizes a memory with separate areas for bucket information and edge data, where an edge write controller writes and an edge read controller reads data efficiently, optimizing memory access by using bucket IDs and edge counts to store and retrieve edge data, and a rasterizer converts edge data into raster images while deleting invalid data to minimize buffer size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If edge data is stored in a single memory area, then memory access is simple, but memory bandwidth usage increases and processing efficiency decreases

Engineering Contradiction:
Improveedge data processing efficiencyVSAvoidmemory bandwidth usage
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The memory is divided into two separate areas: a first memory area for storing bucket information and a second memory area for storing edge data. This segmentation allows independent access patterns for different types of data, reducing unnecessary memory bandwidth usage and improving processing efficiency by enabling parallel or optimized access routes.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If all edge data is retained in the buffer, then data completeness is maintained, but buffer size increases and memory resources are consumed

Engineering Contradiction:
Improvedata completenessVSAvoidbuffer size
Core Design Contradiction:
Quantity of substanceVSVolume of stationary object

Solution Approach 1:

The rasterizer deletes invalid edge data from the buffer after it has been processed and converted into raster image data. This allows the buffer to maintain only the necessary valid edge data, reducing buffer size and memory resource consumption while preserving data completeness for active processing.

Inventive Principle:
Principle #34Discarding and recovering

3Device complexity

If bucket information and edge data are stored together, then data structure is simple, but access efficiency decreases due to unrelated data being read

Engineering Contradiction:
Improvedata structure complexityVSAvoidmemory access speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

Bucket information and edge data are stored in separate memory areas. The edge write controller writes bucket information to the first memory area and edge data to the second memory area at locations appointed by the bucket information. This separation enables the edge read controller to access only relevant data based on bucket IDs, improving memory access speed by avoiding retrieval of unrelated data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Bucket information acts as an intermediary index that connects the first memory area (bucket information) with the second memory area (edge data). The bucket information contains location pointers that enable efficient indirect access to edge data without reading through unrelated data, thus improving access speed while maintaining a manageable data structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9053560B2Edge management unit for 2-dimension vector graphics, graphic processing apparatus and method thereof
Publication Date: 2015.06.09 SAMSUNG ELECTRONICS CO LTD
  • US9053560B2 patent drawing
  • US9053560B2 patent drawing
  • US9053560B2 patent drawing

AI summary

Disclosed is an edge management unit of accessing a memory including a first memory area and a second memory area. The edge management unit comprises an edge write controller writing bucket information corresponding to input edge data in the first memory area and the edge data at a location of the second memory area appointed by the bucket information; and an edge read controller responding to a scan line signal to read the bucket information from the first memory area and the edge data from a location of the second memory area appointed by the read bucket information.