Edge Electrode Resonance Circuit for Uniform Plasma Etching
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Solution Overview
Problem
Existing plasma processing equipment struggles to efficiently control plasma for forming high aspect ratio openings in semiconductor manufacturing, as lowering bias frequency and increasing RF power leads to loading effects and uneven etch rates, affecting the reliability and uniformity of semiconductor devices.
Innovation Solution
The equipment incorporates a chuck stage with a dielectric ring, edge electrode, and resonance circuit that includes a filter circuit and series resonance circuit to selectively transmit specific frequencies, allowing precise control of plasma incidence angles and uniform etch rates across the substrate, using a variable capacitor to adjust electric potential at the edge region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If RF power is increased to improve etch rate, then etch rate increases, but loading effect increases and plasma control deteriorates
Solution Approach 1:
The patent applies periodic pulsing of RF power to the plasma processing system. By switching between high power and low power states in a controlled cycle, the system achieves high etch rates during high power phases while allowing plasma parameters to stabilize during low power phases, thereby resolving the contradiction between productivity and plasma control reliability
Solution Approach 2:
The patent dynamically adjusts RF power levels and bias voltages during the plasma processing cycle. By making real-time adjustments to power delivery based on process conditions, the system maintains optimal plasma control while achieving high etch rates, preventing the degradation that occurs with static high power operation
2Use of energy by moving object
If bias frequency is lowered to improve ion energy, then ion energy increases, but loading effect increases and etch uniformity deteriorates
Solution Approach 1:
The patent uses periodic modulation of bias frequency and power levels to maintain high ion energy while preventing loading effects. The alternating cycles allow ions to gain sufficient energy during high power phases while the system resets during low power phases, maintaining etch uniformity across the substrate
Solution Approach 2:
The patent dynamically changes multiple plasma parameters including bias frequency, RF power, and gas flow rates during processing. By coordinating changes in these parameters, the system maintains high ion energy for deep etching while preventing the loading effects that would otherwise cause non-uniform etching across the substrate
3Object-affected harmful factors
If RF power is pulsed to mitigate charging effect, then charging effect is reduced, but plasma control precision deteriorates
Solution Approach 1:
The patent employs precisely timed periodic pulsing of RF power where high power phases are followed by low power recovery phases. This timing is optimized to allow charging effects to dissipate during low power phases while maintaining feature formation precision through controlled plasma conditions during high power phases
Solution Approach 2:
The patent implements feedback control mechanisms that monitor plasma parameters and adjust RF power pulsing in real-time. This feedback ensures that charging effects are mitigated while maintaining precise control over feature formation, preventing the degradation that would occur with simple open-loop pulsing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures consistent plasma incidence angles and uniform etch rates, enhancing the reliability and performance of semiconductor devices by minimizing the need for frequent edge ring replacements and maintaining process uniformity.
Implementation Method 1
a resonance circuit connected to the edge electrode. The resonance circuit includes a filter circuit which allows only the third signal among the first, second and third signals to pass from the filter circuit, and a series resonance circuit connected in series with the filter circuit and having a coil and a grounded variable capacitor connected in series to the coil
Data Source
AI summary
Plasma processing equipment includes a chuck stage for supporting a wafer and including a lower electrode, an upper electrode disposed on the chuck stage, an AC power supply which applies first to third signals having different magnitudes of frequencies to the upper electrode or the lower electrode, a dielectric ring which surrounds the chuck stage, an edge electrode located within the dielectric ring, and a resonance circuit connected to the edge electrode. The resonance circuit includes a filter circuit which allows only the third signal among the first to third signals to pass, and a series resonance circuit connected in series with the filter circuit and having a first coil and a first variable capacitor connected in series and grounded.


