Edge Ring DC Timing for Stable Wafer-Edge Plasma Processing
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Solution Overview
Problem
Existing plasma processing apparatuses face challenges in controlling the tilt angle of ion incidence on the edge area of a wafer due to sheath shape changes caused by edge ring consumption, leading to potential discharges and wafer damage from uncontrolled potential differences during pulsed radio-frequency power application.
Innovation Solution
A plasma processing apparatus with a controller that adjusts the application timing of DC voltage to the edge ring using delay times to synchronize with radio-frequency power, ensuring controlled sheath shape and suppressing discharges by maintaining a stable potential difference between the wafer and edge ring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If DC voltage is applied to the edge ring in synchronization with RF power supply, then plasma processing efficiency is improved, but potential differences and discharges occur between the wafer and edge ring causing wafer damage
Solution Approach 1:
The patent applies a negative DC voltage to the edge ring before RF power supply begins. This preliminary action ensures that the edge ring is already at the correct potential when plasma generation starts, preventing sudden potential differences and discharges that would occur if DC voltage were applied simultaneously with or after RF power supply.
Solution Approach 2:
The patent introduces a delay time in the DC power supply to allow the edge ring to follow potential changes of the wafer before applying full DC voltage. This cushioning approach prevents abrupt potential changes that could cause discharges, while still maintaining the benefits of DC voltage application for plasma processing efficiency.
2Speed
If DC voltage is applied immediately when RF power is supplied, then processing speed is improved, but discharge occurs due to immediate potential changes
Solution Approach 1:
The patent applies DC voltage to the edge ring before RF power supply starts, ensuring the edge ring is pre-positioned at the appropriate potential. This eliminates the need for immediate DC voltage application when RF power is supplied, preventing discharges while maintaining processing speed through advance preparation.
Solution Approach 2:
The patent introduces a delay mechanism in the DC power supply that allows the edge ring to adapt to potential changes before full DC voltage is applied. This cushioning prevents abrupt potential differences that cause discharges, while the overall process remains efficient due to the preliminary action taken before RF power supply.
3Manufacturing precision
If DC voltage application is synchronized with RF power supply, then plasma uniformity is improved, but control complexity increases due to timing precision requirements
Solution Approach 1:
The patent applies DC voltage to the edge ring before RF power supply begins, eliminating the need for precise synchronization timing. This preliminary action simplifies the control system while maintaining plasma uniformity, as the edge ring is already at the correct potential when plasma generation starts.
Solution Approach 2:
The patent introduces a delay time mechanism that allows the edge ring to follow potential changes before DC voltage is fully applied. This approach maintains plasma uniformity while reducing control complexity by providing a buffer that tolerates timing variations without causing discharges or affecting plasma quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The apparatus effectively controls the tilt angle of ion incidence, maintaining uniform plasma processing and preventing wafer damage by stabilizing the potential difference, thus ensuring consistent and reliable plasma processing results.
Implementation Method 1
a negative DC voltage is applied to the edge ring used up by plasma so that the distortion of a sheath is eliminated, and ions are allowed to vertically enter the entire surface of the wafer
Implementation Method 2
plasma processing is performed on the wafer
Implementation Method 3
ions are allowed to vertically enter the entire surface of the wafer
Data Source
AI summary
A plasma processing apparatus includes: a chamber; a substrate support disposed in the chamber, the substrate support including a lower electrode; an edge ring disposed to surround a substrate on the substrate support; an upper electrode disposed above the substrate support; a first RF power supply; a first DC power supply; and a controller configured to cause: (a) starting supply of a first RF power from the first RF power supply to the upper electrode or the lower electrode; and (b) after (a), starting the application of a first DC voltage from the first DC power supply to the edge ring when a first delay time elapses.


