Edge-Shifted Test Vectors for Parallel Device Testing

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Solution Overview

Problem

Traditional methods for acquiring pin-to-pin measurements in integrated circuits, such as binary and linear searches, are time-consuming, require manual setup, and are not well-suited for parallel testing of multiple devices under test, leading to inefficiencies and increased test time.

Innovation Solution

The method involves configuring a device interface board with multiple devices under test and running edge-shifted test vectors in parallel loops, allowing for simultaneous testing and reducing test time by determining fail information based on the number of edge shifts, enabling both coarse and fine resolution testing with reduced overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If binary search is used for pin-to-pin measurements, then measurement capability is achieved, but test time increases and manual setup is required

Engineering Contradiction:
Improvetiming measurement capabilityVSAvoidtest time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores edge shift values in a lookup table before testing begins. Instead of performing binary search calculations during the actual measurement process, the system prepares all possible edge shift values in advance, allowing direct retrieval during testing and eliminating iterative search operations that consume test time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the manual binary search algorithm with an automated lookup table-based system. The mechanical/manual process of iteratively adjusting edges and determining pass/fail is substituted with automated retrieval of pre-computed edge shift values, reducing both manual intervention and test time while maintaining measurement precision.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If binary search is used for pin-to-pin measurements, then timing parameters can be measured, but the method cannot easily test multiple devices in parallel

Engineering Contradiction:
Improvetiming parameter measurementVSAvoidparallel testing capability
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal testing framework where the lookup table stores edge shift values that can be applied to multiple devices simultaneously. The system design allows the same pre-computed edge shift data to serve multiple DUTs in parallel, making the measurement system versatile and adaptable to testing multiple devices without requiring separate binary search procedures for each device.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If linear search is used for pin-to-pin measurements, then simple implementation is achieved, but test time increases significantly

Engineering Contradiction:
Improveimplementation simplicityVSAvoidtest time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent performs the computationally intensive work of calculating all possible edge shift values in advance and storing them in a lookup table. This preliminary action transforms the simple but time-consuming linear search into a fast lookup operation during actual testing, maintaining implementation simplicity while dramatically reducing test time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter representation from sequential linear search steps to pre-computed edge shift values stored in a lookup table. By transforming the search space into a structured format with predetermined values, the system maintains ease of implementation while achieving faster measurement results.

Inventive Principle:
Principle #35Parameter changes

4Reliability

If linear search is used with wide search window, then coverage is improved, but test time increases due to more steps required

Engineering Contradiction:
Improvemeasurement coverageVSAvoidtest time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-calculates edge shift values for the entire search window range and stores them in a lookup table before testing begins. This allows the system to handle wide search windows efficiently by retrieving pre-computed values rather than iterating through each step, maintaining comprehensive coverage while reducing the number of actual test steps executed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10236074B1Circuits for and methods of making measurements in a testing arrangement having a plurality of devices under test
Publication Date: 2019.03.19 XILINX INC
  • US10236074B1 patent drawing
  • US10236074B1 patent drawing
  • US10236074B1 patent drawing

AI summary

A method of making measurements in a testing arrangement having a plurality of devices under test is described. The method comprises configuring a device interface board with the plurality of devices under test; running a set of test vectors in a plurality of loops on each device under test of the plurality of devices under test, wherein the set of test vectors is run in parallel on the plurality of devices under test and comprises edge shifted test vectors which are shifted by a predetermined edge shift step during each loop; receiving test result data for the plurality of devices under test; and determining, for each device under test, fail information to identify when the device under test failed based upon a number of edge shift steps. A system for making measurements in a testing arrangement having a plurality of devices under test is also described.