Edge Termination Protection in Power Semiconductor Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing power semiconductor devices face challenges in protecting the edge termination region from mechanical damage, humidity, hazardous gases, and particles, particularly during high voltage applications, where the edge termination is prone to electrical field stresses and lacks effective pre-singulation protection.

Innovation Solution

A power semiconductor device design featuring a mold compound pattern portion that overlaps the edge termination region, providing efficient protection against mechanical damage, humidity, and hazardous gases by aligning its circumferential lateral surface with the semiconductor die's surface, and can be formed before singulation, enhancing long-term stability and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the edge termination region is left exposed for individual sealant application after singulation, then manufacturing flexibility is maintained, but the edge termination becomes vulnerable to mechanical damage, humidity, and hazardous gases

Engineering Contradiction:
Improveedge termination protectionVSAvoidprotection structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The mold compound pattern is formed on the semiconductor wafer before singulation, creating a protective structure in advance. This preliminary action ensures the edge termination region is protected from mechanical damage, humidity, and hazardous gases during both manufacturing and operation, eliminating the need for post-singulation protection steps

Inventive Principle:
Principle #10Preliminary action

2Reliability

If sealant resin is applied after singulation, then individual device protection is achieved, but the process requires many individual steps increasing manufacturing complexity

Engineering Contradiction:
Improveedge termination protectionVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The protection structure formation is merged with the wafer-level processing steps. The mold compound pattern is formed simultaneously for all devices on the wafer before singulation, combining multiple individual protection operations into a single batch process, thereby simplifying manufacturing while maintaining reliable edge termination protection

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the mold compound pattern is formed before singulation, then protection is provided during manufacturing, but the structure must be precisely aligned after separation

Engineering Contradiction:
Improveedge termination protectionVSAvoidlateral surface alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The mold compound pattern is designed as a continuous structure on the wafer that naturally segments into individual protection portions for each semiconductor device during singulation. The circumferential lateral surface portion of the mold compound pattern aligns with the circumferential lateral surface portion of the semiconductor die, creating a continuous lateral surface that extends along the circumference with an inclination angle between 80° and 100°, ensuring precise alignment without requiring additional post-singulation adjustment steps

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3951841A1Power semiconductor devices with edge termination and method of manufacturing the same
Publication Date: 2022.02.09 HITACHI ENERGY LTD
  • EP3951841A1 patent drawingFigure 1A~1B
  • EP3951841A1 patent drawingFigure 2~3
  • EP3951841A1 patent drawingFigure 4~5

AI summary

A power semiconductor device (60), which comprises a semiconductor die (10a) comprising at least one active region (AR) surrounded by an edge termination region (TR), and a method for manufacturing such power semiconductor device (60) are provided. A mold compound pattern portion (40p) is arranged on the first side (11') such that it overlaps the edge termination region (TR) in an orthogonal projection onto a plane parallel to the first side (11'). A circumferential lateral surface portion (45) of the mold compound pattern portion (40p) and a circumferential lateral surface portion (15) of the semiconductor die (10a) are both at least a part of a continuous lateral surface portion (65) of the power semiconductor device (60), wherein the continuous lateral surface portion (65) extends along a lateral circumference of the power semiconductor device (60) and has an inclination angle (α) relative to a plane parallel to the first side (11') in a range between 80° and 100°, or in a range between 85° and 95°.